WI.M900T Radiotronix, WI.M900T Datasheet - Page 9

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WI.M900T

Manufacturer Part Number
WI.M900T
Description
RF Modules & Development Tools TRANSMIT ONLY VERS. OF WI.232DTS MODULE
Manufacturer
Radiotronix
Datasheet

Specifications of WI.M900T

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
WIM900T
Preliminary
SWITCH1 SWITCH2
LOW
HIGH
LOW
HIGH
Internally, the XE1203 has two identical sets of programming registers (SWParam) that
control the operation of the chip. Generally, one set is programmed for receive mode
and the other set is programmed for transmit mode. For the Wi.M900X/T module, set 1
is for receive mode and set 2 is for transmit mode.
For the Wi.M900T module, the register sets can be used to quickly switch between two
frequencies. Register set 1 is selected when SWITCH2 is low, and register set 2 is
selected when SWITCH2 is high.
In addition to the SWParam registers, there are three other register sets that set the
operation of the module.
The ConfigSwitch register controls the operation of the SWITCH pin on the XE1203.
Since we are using the SWITCH pin as an input, the value of ConfigSwitch does not
matter.
The RTParam registers controls the operation of the radio itself. The FSParam registers
controls the operation of the frequency synthesizer. The ADParam register determines
the parameters of operation for the digital data interface. All of these registers are used
in both receive and transmit mode. They can be programmed to meet the customer’s
needs. The only requirement is that bit 3 (RTParam_Switch_Ext) of RTParam must be
set to 1.
The receive chain is a traditional zero-IF architecture. The filter bandwidth is
programmable and can be set to 200kHz or 600kHz. RSSI is derived from the I-channel.
It is digitized internally and can be read from the DataOut register.
Frequency error indication (FEI) is derived from both the I and Q channels. Its value can
be read from the DataOut register. FEI can be used to correct for crystal frequency
errors caused by temperature variations.
The demodulator re-creates the data stream. It demodulates the FSK modulated base-
band carrier, extracts the bit stream timing, and samples the raw bit stream to accurately
reproduce the original data.
In receive mode, the data interface is synchronous, operating as an SPI master. The
module determines the data timing; the DCLK pin is the clock and the DATA pin is the
data output.
In transmit mode, the data interface is asynchronous, operating as an SPI slave. The
data timing is determined by the host microcontroller. The DCLK pin is not used in
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LOW
LOW
HIGH
HIGH
RF MODE
Receive – switch off
Receive
Transmit
Transmit – switch off
Revision A
XE1203 REG SET
SWParam1
SWParam1
SWParam2
SWParam2
Preliminary
9

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