MRF89XAM9A-I/RM Microchip Technology, MRF89XAM9A-I/RM Datasheet - Page 80

• Manufacturer Part Number: MRF89XAM9A-I/RM
• Description: WiFi / 802.11 Modules & Development Tools 915MHz Sub-GHz Transceiver Mod
• Manufacturer: Microchip Technology

Specifications of MRF89XAM9A-I/RM

• Modulation Type: FSK, OOK
• Data Rate Max: 200Kbps
• Sensitivity: -113dBm
• Supply Voltage Range: 2.1V To 3.6V
• Module Interface: SPI, 4-Wire
• Supply Current: 25mA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

3.9.4
Note that some connections may not be needed
depending on the application:
• IRQ0: If Sync and RSSI interrupts are not used. In
• IRQ1: If the device is never used in TX FSK mode
• SDO: If no read register access is needed. In this
FIGURE 3-20:
3.9.5
The data processing related registers are appropriately
configured as listed Table 3-7. In this example we
assume that both Bit synchronizer and Sync word
recognition are on.
TABLE 3-7:
DS70622B-page 80
MRF89XA
DMODREG
FTXRXIREG
SYNCREG
SYNCREG
SYNCREG
SYNCV31REG
SYNCV23REG
SYNCV15REG
SYNCV07REG
this case, leave the pin floating.
(DCLK connection is not compulsory in RX and
TX OOK modes). In this case, leave the pin
floating.
case, pull-up to V
Note:
Register Name
MRF89XA
HOST MICROCONTROLLER
INTERFACE/REQUIRED
CONNECTIONS
The CSDAT pin (pin15), which is unused
in Continuous mode, should be pulled-up
to V
Table 2-4, details the MRF89XA pin con-
figuration and chip mode.
CONTINUOUS MODE EXAMPLE
IRQ1 (DCLK)
CSCON
DD
IRQ0
CONFIGURATION REGISTERS RELATED TO DATA PROCESSING (ONLY) IN
CONTINUOUS MODE
DATA
SDO
SCK
DD
SDI
DMODE0, DMODE1
IRQ0RXS<1:0>
SYNCREN
SYNCWSZ<1:0>
SYNCTEN<1:0>
SYNCV<31:24>
SYNCV<23:16>
SYNCV<7:0>
SYNCV<15:8>
through a 100 kΩ resistor.
HOST MCU
CONNECTIONS IN
CONTINUOUS MODE
through a 100 kΩ resistor.
Register Bits
Microcontroller
PIC
®
TX
X
Preliminary
RX
X
X
X
X
X
X
X
X
X
TX Mode:
1.
2.
3.
RX Mode:
1.
2.
3.
4.
5.
3.9.6
The registers associated with Continuous mode are:
• GCONREG (Register 2-1)
• DMODREG (Register 2-2)
• FDEVREG (Register 2-3)
• BRSREG (Register 2-4)
• FLTHREG (Register 2-5)
• FIFOCREG (Register 2-6)
• FTXRXIREG (Register 2-14)
• FTPRIREG (Register 2-15)
• RSTHIREG (Register 2-16)
• FILCREG (Register 2-17)
• PFCREG (Register 2-18)
• SYNCREG (Register 2-19)
• RSTSREG (Register 2-21)
• OOKCREG (Register 2-22)
• SYNCV31REG (Register 2-23)
• SYNCV23REG (Register 2-24)
• SYNCV15REG (Register 2-25)
• SYNCV07REG (Register 2-26)
Defines data operation mode (
Defines IRQ0 source in RX mode
Enables Sync word recognition
Defines Sync word size
Defines the error tolerance on Sync word recognition
Defines Sync word value
Defines Sync word value
Defines Sync word value
Defines Sync word value
Go to TX mode (and wait for TX to be ready, see
Figure 5-3).
Send all packet bits on the DATA pin
synchronously with the DCLK signal provided
on IRQ1.
Go to Sleep mode.
Program RX interrupts: IRQ0 mapped to Sync
(IRQ0RXS<1:0> = 00) and IRQ1 mapped to
DCLK (Bit synchronizer enabled).
Go to RX mode (note that RX is not ready
immediately, see Figure 5-2).
Wait for Sync interrupt.
Get
synchronously with the DCLK signal provided
on IRQ1.
Go to Sleep mode.
all
CONTINUOUS MODE REGISTERS
packet
Description
© 2010 Microchip Technology Inc.
bits
on
Continuous)
the
DATA
pin