5M80ZT100C5N Altera, 5M80ZT100C5N Datasheet
5M80ZT100C5N
Specifications of 5M80ZT100C5N
Available stocks
Related parts for 5M80ZT100C5N
5M80ZT100C5N Summary of contents
Page 1
... Altera Product Catalog Version 11.0 ...
Page 2
Contents Glossary.. . ......................................................... 2 Stratix .FPGA.Series........................................ 3 ® HardCopy .ASIC.Series. . ................................. 17 ® Arria .FPGA.Series. . ....................................... 21 ® Cyclone .FPGA.Series.................................... 27 ® MAX .CPLD.Series......................................... 37 ® Quartus .II.Software...................................... 41 ® Embedded.Processing.................................... 44 Intellectual.Property. . ..................................... 47 Development.Kits. ...
Page 3
... With Altera, you get a complete design environment and a wide choice of design tools – all built to work together easily so your designs are up and running fast. You can try one of our training classes to get a jump start on your designs. Choose Altera and see how we will enhance your productivity and make a difference to your bottom line. ...
Page 4
... Glossary Glossary Below is a glossary of helpful terms to bring you up to speed on Altera devices. Term Logic building block, used by some Altera devices, which provides advanced features with efficient logic Adaptive logic module (ALM) utilization. Each ALM contains a variety of look-up table (LUT)-based resources that can be divided between two combinational adaptive LUTs (ALUTs) ...
Page 5
... The following features, packages, and I/O matrices give you an overview of our devices. To get the full story, check out our online selector guide: www.altera.com/selector. ALMs Equivalent LEs Registers 2 M20K memory blocks M20K memory (Mb) MLAB memory (Mb) 18-bit x 18-bit multipliers 27-bit x 27-bit DSP blocks ...
Page 6
... Gbps PCIe hard IP blocks 100GbE hard IP blocks No Memory devices supported All data is preliminary. 1 3.3-V compliant, requires a 3-V power supply Altera Product Catalog 2011 www.altera.com • • Stratix V GX FPGAs (0.85 V 14.1-Gbps Transceivers 5SGXA4 5SGXA5 5SGXA7 113,000 160,500 234,750 300,000 ...
Page 7
... Stratix V GS FPGA Features 1 5SGSD5 5SGSD6 174,000 220,000 462,000 583,000 696,000 880,000 1,950 2,320 40 48 5.30 6.70 2,966 3,550 1,483 1,775 -2, -3, -4 -1, - 175 225 Altera Product Catalog 2011 www.altera.com • • Devices 5SGSD8 265,000 703,000 1,060,000 2,688 55 8.10 4,096 2,048 225 ...
Page 8
... LVDS channels, 1.4 Gbps (receive/transmit) Embedded DPA circuitry Series, parallel, and differential OCT 100GbE hard IP blocks Memory devices supported All data is preliminary. 1 3.3-V compliant, requires a 3-V power supply Altera Product Catalog 2011 www.altera.com • • Stratix V E FPGAs (0.85 V) 5SEE9 317,000 840,000 1,268,000 2,640 52 9 ...
Page 9
... Altera Product Catalog 2011 www.altera.com • • Devices 212,480 531,200 424,960 1,280 64 6,640 20,736 1,024 88 112 12/96 172 256 32/0/ ...
Page 10
... This is the base core logic register count. The ALM can support three registers when used 2 in LUTREG mode, which increases the total register count by an additional 50 percent. EP4SGX360N has 1,024 18x18 multipliers Altera Product Catalog 2011 www.altera.com • • Stratix IV GX FPGAs (0.9 V), 8.5-Gbps Transceivers ...
Page 11
... DDR3, DDR2, DDR, QDR II, RLDRAM II, SDR Devices Stratix IV E FPGA Features EP4SE530 EP4SE820 212,480 325,220 531,200 813,050 424,960 650,440 1,280 1,610 64 60 6,640 10,163 20,736 23,130 1,024 960 -2, - 112 132 12/ 172 230 3 2 256 288 112/112 132/132 3 3 Altera Product Catalog 2011 www.altera.com • • 9 ...
Page 12
... This is the base core logic register count. The ALM can support three registers when used in LUTREG mode, which increases the total register count by an additional 50 percent. 1 The size of the MLAB ROM is twice the size of the MLAB RAM Altera Product Catalog 2011 www.altera.com • • ...
Page 13
... LVDS, LVPECL, Differential SSTL-18, Differential SSTL-2, Differential HSTL, SSTL-18 (I and II), SSTL-15 (I and II), SSTL-2 (I and II), 1.5-V HSTL (I and II), 1.8-V HSTL (I and II), PCI, PCI-X 1.0, LVTTL, LVCMOS 56 88 56/56 88/ DDR3, DDR2, DDR, QDR II, RLDRAM II, SDR Altera Product Catalog Devices Stratix III E FPGA Features EP3SE110 EP3SE260 42,600 101,760 107,500 254,400 85,200 ...
Page 14
... Maximum PLLs/unique outputs, LVDS channels, and transceiver channels for the product line shown. Various packages offer a variety of options to meet your design needs. 1 This is the base core logic register count. The ALM can support three registers when used in LUTREG mode, which increases the total register count by an additional 50 percent Altera Product Catalog 2011 www.altera.com • • ...
Page 15
... Altera Product Catalog Devices 1,152 pin 1,517 pin (mm (mm) 1.0-mm pitch 1.0-mm pitch 444, 111, 36 624, 156, 36 444, 111, 36 ...
Page 16
... Numbers indicate GPIO count, LVDS count, and transceiver count. 264, 66, 24 Vertical migration (same GND, ISP, and input pins). User I/Os may be less than labelled for vertical migration. Stratix series devices are offered in commercial and industrial temperatures and RoHS-compliant packages. 14 Altera Product Catalog 2011 www.altera.com • • ...
Page 17
... Altera Product Catalog 2011 www.altera.com • • Devices 904 904 904 15 ...
Page 18
... Vertical migration (same GND, ISP, and input pins). For vertical migration, the number of user I/Os may be less than the number stated in the table. Stratix series devices are offered in commercial and industrial temperatures and RoHS-compliant packages. Stratix IV GT devices are only offered in industrial temperatures (0˚C to 100˚C). 16 Altera Product Catalog 2011 www.altera.com • ...
Page 19
... HSTL (I and II), 1.5-V HSTL (I and II), 1.8-V HSTL (I and II) 184 236 280 28/28 44/44 88/ 8/0 16/8 24/ DDR3, DDR2, DDR, QDR II, RLDRAM II, SDR Altera Product Catalog Devices HardCopy IV ASIC Features HC4E25 HC4E35 9.4M 15M 353,600 813,050 864 1,320 32 48 12,384 18,792 1,288 ...
Page 20
... Series and differential OCT Memory devices supported Implemented in HCells. 1 Since all HardCopy ASICs contain hard-wired logic, they are inherently secure. 2 3.3-V compliant, requires a 3-V power supply Altera Product Catalog 2011 www.altera.com • • HardCopy III ASICs (0.9 V) HC325 7.0M 338,000 864 ...
Page 21
... LVTTL, LVCMOS, PCI, PCI-X 1.0, LVDS, LVPECL, Differential SSTL-18, Differential SSTL-2, Differential HSTL SSTL-18 (I and II), SSTL-2 (I and II), 1.5-V HSTL (I and II), 1.8-V HSTL (I and II), HyperTransport 17/13 21/19 30/29 DDR2, DDR, QDR II, RLDRAM II, SDR Altera Product Catalog Devices HardCopy II ASIC Features HC230 HC240 1.9M 2.9M 3.6M ...
Page 22
... Performance-optimized flip chip. 4 636 Number indicates available user I/O pins. All HardCopy series devices are offered in commercial, industrial, and extended temperature grades. Package options include leaded, RoHS-compliant, lidless, or lidded. 20 Altera Product Catalog 2011 www.altera.com • • HardCopy IV ASICs (0.9 V), 6.5-Gbps Transceivers ...
Page 23
... TBD TBD TBD TBD 3 2 120 160 160 152 Altera Product Catalog 2011 www.altera.com • • Devices 5AGXB7 190,000 503,500 760,000 2,378 23,780 2,943 1,139 2,278 16/64 TBD 152 ...
Page 24
... Memory devices supported Maximum LVDS channels, transceiver channels, PLLs, and PCIe hard IP blocks for the product line shown.Various packages offer a variety of options to meet your design needs. 1 3.3-V compliant, requires a 3-V power supply Altera Product Catalog 2011 www.altera.com • • Arria V GT FPGAs (1 ...
Page 25
... Differential HSTL-15, SSTL-18 (I and II), SSTL-15 (I), SSTL-2 (I and II), 1.8-V HSTL (I and II), 1.5-V HSTL (I and II), 1.2-V HSTL (I and II 85/84 85/84 105/104 DDR3, DDR2, DDR, QDR II Altera Product Catalog Devices Arria II GX FPGA Features EP2AGX125 EP2AGX190 EP2AGX260 49,640 76,120 102,600 124,100 190,300 256,500 99,280 ...
Page 26
... LVDS channels, 1,250 Mbps (receive/transmit) Embedded DPA circuitry Series and differential OCT Transceiver (SERDES) channels, 6.375 Gbps PCIe hard IP block (value as 1.1, 2.0, etc) Memory devices supported 24 Altera Product Catalog 2011 www.altera.com • • Arria II GZ FPGAs (0.9 V 6.375-Gbps Transceivers EP2AGZ225 EP2AGZ300 89,600 ...
Page 27
... Devices 1,152 pin 1,517 pin (mm (mm) 1.0-mm pitch 1.0-mm pitch 544 24 544 384 24 18 544 704 24 24 544 704 24 24 528 668 24 36 528 668 24 36 544 704 12+4 12+4 528 688 12+4 12+8 Altera Product Catalog 2011 www.altera.com • • 25 ...
Page 28
... Values on top indicate available user I/O pins; values at the bottom indicate transceiver count. 12 Vertical migration (same GND, ISP, and input pins). For vertical migration, the number of user I/Os may be less than the number stated in the table. 26 Altera Product Catalog 2011 www.altera.com • ...
Page 29
... TBD TBD 3 100 122 – – Altera Product Catalog 2011 www.altera.com • • Devices 406 812 16 4 TBD 122 27 ...
Page 30
... Maximum LVDS channels, transceiver channels, PLLs, and PCIe hard IP blocks for the product line shown.Various packages offer a variety of options to meet your design needs. 1 3.3-V compliant, requires a 3-V power supply Altera Product Catalog 2011 www.altera.com • • Cyclone V GX FPGAs (1.1 V), 3.125-Gbps Transceivers ...
Page 31
... DDR3, DDR2, DDR, LPDDR, LPDDR2 Cyclone V GT FPGA Features 5CGTD5 5CGTD8 56,604 113,208 150,000 300,000 226,416 452,832 602 1,246 6,020 12,460 884 1,769 220 406 440 812 -6, -7, -8 -6, - TBD TBD 3 122 122 – Altera Product Catalog 2011 www.altera.com • • Devices 29 ...
Page 32
... Maximum LVDS channels, transceiver channels, PLLs, and PCIe hard IP blocks for the product line shown. Various packages offer a variety options to meet your design needs Transceiver performance varies by product line and package offering. EP4CGX30 supports 3.125 Gbps only in F484 package option Altera Product Catalog 2011 www.altera.com • • Cyclone IV GX FPGAs (1.2 V) EP4CGX15 ...
Page 33
... DDR2, DDR, QDR II, RLDRAM II, SDR Altera Product Catalog Devices Cyclone IV E FPGA Features EP4CE55 EP4CE75 EP4CE115 55,856 75,408 114,480 260 305 432 2,340 2,745 3,888 ...
Page 34
... I/O standards supported Emulated LVDS channels, 66 840 Mbps Series and differential OCT Memory device supported Not all packages are supported in all speed grades Altera Product Catalog 2011 www.altera.com • • Cyclone III FPGAs (1.2 V) EP3C10 EP3C16 EP3C25 10,320 15,408 24,624 ...
Page 35
... SSTL-2 (I and II), 1.5-V HSTL (I and II), 1.8-V HSTL (I and II), PCI, PCI-X 1.0, LVTTL, LVCMOS 169 3 QDR II, DDR2, DDR, SDR Devices Cyclone III LS FPGA Features EP3CLS150 EP3CLS200 150,848 198,464 666 891 5,994 8,019 320 396 50.6 50.6 Altera Product Catalog 2011 www.altera.com • • 33 ...
Page 36
... Values on top indicate available user I/O pins; values at the bottom indicate the 3.125-Gbps or 5G transceiver count. 12 Vertical migration (same GND, ISP, and input pins). For vertical migration, the number of user I/Os may be less than the number stated in the table. 34 Altera Product Catalog 2011 www.altera.com • ...
Page 37
... MBGA (M) UBGA (U) 164 pin 265 pin 484 pin (mm (mm (mm) 0.5-mm pitch 0.8-mm pitch 0.8-mm pitch 179 179 74 165 153 328 324 292 Altera Product Catalog 2011 www.altera.com • • Devices ...
Page 38
... Number indicates available user I/O pins. Vertical migration (same GND, ISP, and input pins). For vertical migration, the number of user I/Os may be less than the number stated in the table. 36 Altera Product Catalog 2011 www.altera.com • • Cyclone III FPGAs (1.2 V) ...
Page 39
... Yes Yes Yes 1.2, 1.5, 1.8, 2.5, 3.3, 5 114 159 271 3 Yes Yes Yes - - Altera Product Catalog 2011 www.altera.com • • 2210 1700 7.0 Yes 4 4 271 Yes ...
Page 40
... Programmable slew rate Programmable pull-up resistors Programmable ground pins Open-drain outputs Bus hold Typical equivalent macrocells external resistor must be used for 5-V tolerance Altera Product Catalog 2011 www.altera.com • • MAX II CPLDs (3.3 V, 2.5 V, 1.8 V) EPM240/Z EPM570/Z 192 440 4.7, 7.5 5 ...
Page 41
... Maximum output enables 6 LVTTL/LVCMOS Programmable slew rate Open-drain outputs MAX 3000A CPLD Features MAX 3000A CPLDs (3.3 V) EPM3064A EPM3128A EPM3256A 64 128 80 160 4.5, 7.5, 10 5.0, 7. 2.5, 3.3, 5 Altera Product Catalog Devices EPM3512A 256 512 320 640 7. 2011 www.altera.com 39 • • ...
Page 42
... EPM3032A 34 EPM3064A 34 EPM3128A EPM3256A EPM3512A For temperature grades of specific packages (commercial, industrial, or extended temperatures), refer to Altera’s online selector guide Enhanced quad flat pack. Thin quad flat pack Micro FineLine BGA (0.5 mm). Plastic J-lead chip carrier. 5 Plastic quad flat pack ...
Page 43
... IP Base Suite (includes licenses for 15 popular IP cores) Qsys (next-generation system-integration tool) SOPC Builder (legacy system development tool) Rapid Recompile (faster compile for small design changes) Incremental compile (performance preservation and team-based design) ModelSim -Altera Starter Edition ® Functional Simulation ModelSim-Altera Edition Synthesis Quartus Integrated Synthesis (synthesis tool) ...
Page 44
... Automates adding, parameterizing, and linking IP cores—including embedded processors, coprocessors, SOPC Builder peripherals, memories, and user-defined logic. Lets you construct your system-level design using IP cores from Altera’s megafunction library and from Off-the-shelf IP cores Altera’s third-party IP partners. Parallel development ...
Page 45
... Fixed-node license: subscription for one year—Windows only Floating-node license: subscription for one year—Windows/Linux ModelSim-Altera Edition is available as a $945 option for both Quartus II Subscription Edition and Web Edition. It’s 33 percent faster than Starter Edition with no line limitation. Free for both Quartus II Subscription Edition and Web Edition with a 10,000 executable line limitation, ModelSim-Altera Starter Edition is recommended for simulating small FPGA designs ...
Page 46
... Embedded Processing Embedded Portfolio Altera’s FPGA and HardCopy ASIC devices are increasingly being adopted for custom SoC applications. Altera offers the industry’s broadest selection of soft processors, software development tools, OS support, and embedded IP cores. All of these elements support a single FPGA design flow based on Quartus II design software. ...
Page 47
... The Nios II EDS automatically generates a BSP for your software application by adding C libraries and device drivers for 1 Altera-provided peripheral IP. The BSP editor provides full control over your build options board support package management. In addition, the Nios II EDS includes the NicheStack 1 TCP/IP Network Stack, Nios II Edition – ...
Page 48
... Embedded IP Suite (IPS-EMBEDDED). These royalty-free licenses never expire and allow you to target your processor design on any Altera FPGA. The Embedded IP Suite is a value bundle that contains licenses of the Nios II processor IP core, DDR1/2 Memory Controller IP core, Triple Speed Ethernet (TSE) MAC IP core, and the NicheStack TCP/IP Network Stack, Nios II Edition software ...
Page 49
... The following is a partial list of IP functions from Altera and its partners. To get the full story, check out our online selector guide. Product Name Vendor Name Error Detection/Correction Reed-Solomon Compiler Decoder Altera Reed-Solomon Compiler Encoder Altera Reed Solomon Encoder/Decoder II Altera ...
Page 50
... GEOS2+2 Nuvation POS-PHY Level 4 Altera SDLC Controller CAST, Inc. SONET/SDH Deframer Aliathon Qsys-compliant licensed core. 1 48 Altera Product Catalog 2011 www.altera.com • • ...
Page 51
... PCI-X Master/Target Core PLDA 32-/64-bit PCI-X Controller Northwest Logic, Inc. PCI Compiler, 32-Bit Master/Target Altera PCI Compiler, 32-Bit Target Altera PCI Compiler, 64-Bit Master/Target Altera PCI Compiler, 64-Bit Target Altera 32-Bit PCI Bus Master/ Eureka Technology, Inc. Target Interface Qsys-compliant licensed core. 1 ...
Page 52
... Intellectual Property Altera and Partner Functions Product Name Vendor Name USB High-Speed OTG Multi-point CAST, Inc. USB 1.1 Host/Device Microtronix USB 3.0 SuperSpeed 1 PLDA Device Controller USB 3.0 SuperSpeed SLS Corp Device Controller USB 1.1 Host/Device Microtronix SDIO/SD Memory/ Eureka Technology, Inc. ...
Page 53
... Northwest Logic, Inc. SRAM SSRAM (Cypress CY7C1380C) Altera 1 QDR II / II+ Controller Altera supporting UniPHY QDR II SRAM Controller Altera supporting ALTMEMPHY Qsys component (no license required). 1 Qsys-compliant licensed core. 2 Intellectual Property Intellectual Property Altera and Partner Functions Altera Product Catalog 2011 www.altera.com • • 51 ...
Page 54
... Development Kits Altera and Partner Development Kits The following is a list of Altera and partner development kits. To get the full story, check out our online selector guide. Product and Vendor Name DSP Development Kit, Cyclone III Edition 1 Altera Cyclone III Video and Image Processing ...
Page 55
... Gbps. It also provides DDR2 SDRAM, as well as 128 MB of flash memory for booting the FPGAs and DSP devices. This Arria II GX audio and video development kit combines Altera’s proven Arria II GX FPGA-based development hardware and associated IP with OmniTek’s ...
Page 56
... DIP switches, eight bi-color user LEDs, an LCD display, and power and temperature measurement circuitry. This board is based on Altera’s Stratix IV GX FPGA and is a mid-size, single-width AdvancedMC that can be attached to AdvancedTCA carriers or other cards equipped with Stratix IV GX AdvancedMC bays, and used in MicroTCA systems ...
Page 57
... Altera Altera and Partner Development Kits Description This board is based on Altera’s Stratix II GX FPGA and is a full-size, single-width AdvancedMC that can be attached to AdvancedTCA carriers or other cards equipped with AdvancedMC bays, and used in MicroTCA systems. The SF/GX-AMC has all the features of the GX-AMC card and includes four small form factor pluggable-plus (SFP/SFP+) compact optical transceiver connectors ...
Page 58
... FPGA pins are accessible through connectors and clearly labeled test points. The connectors are designed to mate with other CEPD daughterboards. This kit provides a complete hardware and software environment for Altera Stratix II GX FPGAs built around a PCI form factor card compliant with PCI-SIG and targets the development of designs using PCIe Gen1 ...
Page 59
... I and mini-DIN output connector are provided. This daughtercard interfaces a HDMI receiver and transmitter to your Altera FPGA development kit using the HSMC expansion connector. The receiver also supports an analog component video (YCbCr) interface. The card uses the Analog Device AD9889 HDMI Transmitter and AD9880 HDMI Receiver to support HDTV formats up to 1080p ...
Page 60
... This inexpensive module allows the addition of compact flash cards to Daughtercard the Microtronix Product Starter Kit development board system. This platform uses the low-power Altera Cyclone III FPGAs and MAX IIG Cyclone III EP3C25 CPLDs. It demonstrates how to minimize power consumption in portable MAX IIG EPM240T100 and battery-powered embedded systems and gives you the flexibility to create application-specific low-power solutions ...
Page 61
... ASIC and IP designers a vehicle to prototype logic Stratix IV and memory designs using up to six Stratix III or Stratix IV devices. This is a universal FPGA prototyping platform based on Altera’s largest Stratix III devices. Supports 2-MB flash, 2-MB SRAM, four Samtec Stratix III expansion connectors, two Mictor connectors, user LEDs, and push buttons along with RS-232, SPI, and USB interfaces ...
Page 62
... DNMEG_S2GX is hosted on any DN7000 or DN8000 series ASIC Dini Group product, but can also be used alone. This ASIC prototyping board, compliant with PCI-SIG, features two Stratix III Altera Stratix III EP3SL340 devices, two DDR2 SODIMM, and four Stratix IV HSMC connectors. This is a complete logic emulation system that allows you to prototype SoC logic and memory designs ...
Page 63
... This is a video enhancement development platform supporting 100/120-Hz HDTV that is 1080p bandwidth-capable and features 32-bit DDR2 SDRAM memory, a HDMI transmitter, an analog/HDMI receiver, and dual LVDS links. This kit, equipped with an Altera MAX II EPM2210F324C3 device (largest CPLD in the MAX II CPLD MAX II series) and an onboard USB-Blaster cable, functions as a development and education board for CPLD designs ...
Page 64
... Cyclone II EP2C35 FPGA, the DE2 board is designed for university and EP2C35 FPGA college laboratory use suitable for a wide range of exercises in courses on digital logic and computer organization. This is a modified version of the Altera DE2 board with a larger FPGA Cyclone II and more memory excellent vehicle for learning about digital EP2C70F896C6N logic and FPGAs ...
Page 65
... MAX V 5M570Z the kit as a standalone board or combined with a wide variety of daughtercards that are available from third parties. This kit features the Altera Cyclone III FPGA that provides more than enough room for almost any embedded design. This flexible board Cyclone III comes with a suite of SLS IP Cores, drivers, and application software ...
Page 66
... Choose a training path delivered in three different ways: • Instructor-led training, typically lasting one to two days, involves in-person instruction with hands-on exercises from an Altera or Altera partner subject matter expert. Fees vary. • Virtual classrooms, involving live instructor-taught training over the Web, allow you to benefit from the interactivity with an instructor from the comfort of your home or office ...
Page 67
... Learn to design a Nios II soft-core microprocessor system in an embedded design Altera FPGA Memory interfaces Implement interfaces to external memory DSP and video Solve DSP and video system design challenges using Altera system design technology Create secure, reliable designs using the Quartus II design Design security ...
Page 68
... Training Online Training Altera Free Online Training Courses (Courses Are Approximately One Hour in Length) Course Category Course Titles Read Me First! Basics of Programmable Logic Getting started How to Begin a Simple FPGA Design VHDL Basics Verilog HDL Basics Design languages SystemVerilog with the Quartus II Software ...
Page 69
... Altera Free Online Training Courses (Courses Are Approximately One Hour in Length) Course Category Course Titles TimeQuest Timing Analyzer Switching to the TimeQuest Timing Analyzer Timing analysis and closure Timing Closure Using Quartus II Advisors and Design Space Explorer Timing Closure Using Quartus II Physical Synthesis Optimizations ...
Page 70
... Training Online training Altera Free Online Training Courses (Courses Are Approximately One Hour in Length) Course Category Course Titles Designing with the Nios II Processor and SOPC Builder (Day 1) (note: this training is equivalent to day 1 of the instructor-led course of the same name) Developing Software for the Nios II Processor: Tools Overview ...
Page 71
... Altera Product Catalog Reference Stratix II GX HardCopy IV GX Data Rates Data Rates (Gbps per Lane) (Gbps per Lane) 2.97 2.97 0.27/1.485 0.27/1.485 0.27 0.27 0.6 – ...
Page 72
... GPON 2.488 downlink G.709 OTU-2 - OTN, 10GbE with FEC - HiGig+ 3.75 HiGig2 4.0625 70 Altera Product Catalog 2011 www.altera.com • • Protocols, Devices, and Data Rates Arria V GT Arria II GX Cyclone V GX Data Rates Data Rates Data Rates (Gbps per Lane) ...
Page 73
... NA 3.125, 6.25 3.125, 6. Altera Product Catalog Reference Stratix II GX HardCopy IV GX Data Rates Data Rates (Gbps per Lane) (Gbps per Lane) - 0.4, 2.4, 2.8, 3.2 10.3125 - 3.125 – ...
Page 74
... SFI-5.1 2.488 – 3.125 SFI-5.2 - SONET OC-3/OC-12/ 0.155, 0.622, OC-48/OC-192 2.488, NA SPAUI - V-by-One 3 72 Altera Product Catalog 2011 www.altera.com • • Protocols, Devices, and Data Rates Arria V GT Arria II GX Cyclone V GX Data Rates Data Rates Data Rates (Gbps per Lane) ...
Page 75
... Configuration Handbook or the configuration chapter in the handbook of your selected FPGA. Altera’s serial configuration devices store the configuration file for our SRAM-based FPGAs. We designed our serial configuration devices to minimize cost and board space while providing a dedicated FPGA configuration solution. Serial configuration devices are recommended for new designs ...
Page 76
... EPM: MAX 3000A Device Type 3032A, 3064A, 3128A, 3256A, 3512A Package Type F: FineLine BGA (FBGA) L: Plastic J-lead chip carrier (PLCC) Q: Plastic quad flat pack (PQFP) T: Thin quad flat pack (TQFP) 74 Altera Product Catalog 2011 www.altera.com • • 3032A F C 256 -10 Number of pins for devices with ...
Page 77
... U: Ultra FineLine BGA F45 Product-Line Suffix For MAX II devices only Indicates device core voltage G: 1.8V V Blank: 2. zero power device Altera Product Catalog Reference Ordering Codes N Optional Suffix Indicates specific device options or shipment method ES: Engineering sample N: RoHS compliant ...
Page 78
... For Stratix V GX/GS FPGAs only 4: 6.375 Gbps 1: 14.1 Gbps 12.5 Gbps 6: 3.125 Gbps 3: 8.5 Gbps For Stratix V GT FPGAs only For Arria V GT FPGAs only 2: 28G 3: 10.3125 Gbps 3: 25G 4: 20G 76 Altera Product Catalog 2011 www.altera.com • • FineLine BGA H: Hybrid FineLine BGA 3 X ...
Page 79
... Cyclone .V.FPGAs:.lowest.system.cost.and.power ® •. Arria .V.FPGAs:.optimal.balance.of.cost,.power,.. . ® . and.performance •. Stratix .V.FPGAs:.highest.bandwidth.and.system... ® . integration,.and.ultimate.fl .exibility •. HardCopy .V.ASICs:.lowest.total.cost,.risk,.and.. . ® . power.consumption Altera’s 28-nm Device Portfolio: Tailored to Your Design Needs www.altera.com/28nmportfolio Fit All ...
Page 80
... FSC logo ©2011 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS and STRATIX words and logos are trademarks of Altera Corporation and registered in the U.S. Patent and Trademark Office and in other countries. All other words and logos identified as trademarks or service marks are the property of their respective holders as described at www ...