24AA014-I/MS Microchip Technology, 24AA014-I/MS Datasheet - Page 5

• Manufacturer Part Number: 24AA014-I/MS
• Description: IC,SERIAL EEPROM,128X8,CMOS,TSSOP,8PIN,PLASTIC
• Manufacturer: Microchip Technology

Specifications of 24AA014-I/MS

• Rohs Compliant: YES
• Format - Memory: EEPROMs - Serial
• Memory Type: EEPROM
• Memory Size: 1K (128 x 8)
• Speed: 100kHz, 400kHz
• Interface: I²C, 2-Wire Serial
• Voltage - Supply: 1.8 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-MSOP, Micro8™, 8-uMAX, 8-uSOP,
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

2.0
The descriptions of the pins are listed in
TABLE 2-1:
2.1
The A0, A1 and A2 inputs are used by the 24AA014/
24LC014 for multiple device operation. The levels on
these inputs are compared with the corresponding bits
in the slave address. The chip is selected if the com-
pare is true.
Up to eight devices may be connected to the same bus
by using different Chip Select bit combinations. These
inputs must be connected to either V
For the SOT-23 devices up to four devices may be con-
nected to the same bus using different Chip Select bit
combinations.
In most applications, the chip address inputs A0, A1
and A2 are hard-wired to logic ‘0’ or logic ‘1’. For
applications in which these pins are controlled by a
microcontroller or other programmable device, the chip
address pins must be driven to logic ‘0’ or logic ‘1’
before normal device operation can proceed.
2.2
SDA is a bidirectional pin used to transfer addresses
and data into and out of the device. Since it is an open-
drain terminal, the SDA bus requires a pull-up resistor
to V
For normal data transfer, SDA is allowed to change
only during SCL low. Changes during SCL high are
reserved for indicating the Start and Stop conditions.
 2010 Microchip Technology Inc.
Name
SDA
SCL
V
Note 1: The exposed pad on the DFN/TDFN packages can be connected to V
V
WP
A0
A1
A2
CC
CC
SS
(typical 10 k for 100 kHz, 2 kfor 400 kHz).
PIN DESCRIPTIONS
A0, A1, A2 Chip Address Inputs
Serial Data (SDA)
PDIP
1
2
3
4
5
6
7
8
PIN FUNCTION TABLE
SOIC
1
2
3
4
5
6
7
8
TSSOP
1
2
3
4
5
6
7
8
CC
or V
Table
SS
DFN
2-1.
.
1
2
3
4
5
6
7
8
(1)
TDFN
1
2
3
4
5
6
7
8
(1)
2.3
The SCL input is used to synchronize the data transfer
from and to the device.
2.4
This pin must be connected to either V
to V
write operations are inhibited but read operations are
not affected.
3.0
The 24AA014/24LC014 supports a bidirectional, 2-wire
bus and data transmission protocol. A device that
sends data onto the bus is defined as transmitter, while
a device receiving data is defined as a receiver. The
bus has to be controlled by a master device which gen-
erates the Serial Clock (SCL), controls the bus access
and generates the Start and Stop conditions, while the
24AA014/24LC014 works as slave. Both master and
slave can operate as transmitter or receiver, but the
master device determines which mode is activated.
MSOP
SS
1
2
3
4
5
6
7
8
24AA014/24LC014
, write operations are enabled. If tied to V
Serial Clock (SCL)
Write-Protect (WP)
FUNCTIONAL DESCRIPTION
SOT-23
—
—
5
4
2
3
1
6
SS
Chip Address Input
Chip Address Input
Chip Address Input
Ground
Serial Address/Data I/O
Serial Clock
Write-Protect Input
+1.7V to 5.5V Power Supply
or left floating.
Description
DS21809G-page 5
SS
or V
CC
. If tied
CC
,