24LC02BH-E/SN Microchip Technology, 24LC02BH-E/SN Datasheet - Page 9
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24LC02BH-E/SN
Manufacturer Part Number
24LC02BH-E/SN
Description
2K, 256 X 8 SERIAL EE, 2.5V EXT, 1/2 ARRAY WP 8 SOIC 3.90mm (.150") TUBE
Manufacturer
Microchip Technology
Datasheet
1.24AA02H-ISN.pdf
(30 pages)
Specifications of 24LC02BH-E/SN
Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Memory Size
2K (256 x 8)
Speed
400kHz
Interface
I²C, 2-Wire Serial
Voltage - Supply
2.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Package / Case
8-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
6.0
Since the device will not acknowledge during a write
cycle, this can be used to determine when the cycle is
complete (this feature can be used to maximize bus
throughput). Once the Stop condition for a Write
command has been issued from the master, the device
initiates the internally-timed write cycle and ACK polling
can then be initiated immediately. This involves the
master sending a Start condition followed by the control
byte for a Write command (R/W =
busy with the write cycle, no ACK will be returned. If the
cycle is complete, the device will return the ACK and
the master can then proceed with the next Read or
Write command. See Figure 6-1 for a flow diagram of
this operation.
FIGURE 6-1:
© 2008 Microchip Technology Inc.
ACKNOWLEDGE POLLING
Initiate Write Cycle
Send Control Byte
Write Command
with R/W = 0
Acknowledge
Condition to
Send Stop
(ACK = 0)?
Send Start
Did Device
Operation
Send
Next
ACKNOWLEDGE
POLLING FLOW
Yes
0
). If the device is still
No
7.0
The WP pin allows the user to write-protect half of the
array (80h-FFh) when the pin is tied to V
V
24AA02H/24LC02BH
SS
, the write protection is disabled.
WRITE PROTECTION
DS22105A-page 9
CC
. If tied to