AD1939WBSTZ-RL Analog Devices Inc, AD1939WBSTZ-RL Datasheet - Page 19

• Manufacturer Part Number: AD1939WBSTZ-RL
• Description: 4-ADC 8-DAC Audio Codec W/on Chip PLL
• Manufacturer: Analog Devices Inc
• Type: General Purposer

Specifications of AD1939WBSTZ-RL

• Data Interface: Serial
• Resolution (bits): 24 b
• Number Of Adcs / Dacs: 4 / 8
• Sigma Delta: Yes
• S/n Ratio, Adcs / Dacs (db) Typ: 94 / 94
• Dynamic Range, Adcs / Dacs (db) Typ: 105 / 110
• Voltage - Supply, Analog: 3 V ~ 3.6 V
• Voltage - Supply, Digital: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 105°C
• Mounting Type: Surface Mount
• Package / Case: 64-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

DAISY-CHAIN MODE
The AD1939 also allows a daisy-chain configuration to expand
the system to 8 ADCs and 16 DACs (see Figure 18). In this
mode, the DBCLK frequency is 512 f
DAC TDM data stream belong to the first AD1939 in the chain
and the last eight slots belong to the second AD1939. The second
AD1939 is the device attached to the DSP TDM port.
To accommodate 16 channels at a 96 kHz sample rate, the
AD1939 can be configured into a dual-line, TDM mode as
shown in Figure 19. This mode allows a slower DBCLK than
normally required by the one-line TDM mode.
Again, the first four channels of each TDM input belong to the
first AD1939 in the chain and the last four channels belong to
the second AD1939.
The dual-line TDM mode can also be used to send data at a
192 kHz sample rate into the AD1939 as shown in Figure 20.
OF THE SECOND AD1939
OF THE SECOND AD1939
TO THE FIRST AD1939
DSDATA2 (TDM_OUT)
DSDATA1 (TDM_IN)
THIS IS THE TDM
DLRCLK
Figure 18. Single-Line DAC TDM Daisy-Chain Mode (Applicable to 48 kHz Sample Rate, 16-Channel, Two-AD1939 Daisy Chain)
DBCLK
AD1939
FIRST
DAC L1 DAC R1 DAC L2 DAC R2 DAC L3 DAC R3 DAC L4 DAC R4 DAC L1 DAC R1 DAC L2 DAC R2 DAC L3 DAC R3 DAC L4 DAC R4
8 DAC CHANNELS OF THE FIRST IC IN THE CHAIN
SECOND
AD1939
S
. The first eight slots of the
8 UNUSED SLOTS
DSP
Rev. C | Page 19 of 32
There are two configurations for the ADC port to work in
daisy-chain mode. The first one is with an ABCLK at 256 f
shown in Figure 21. The second configuration is shown in
Figure 22. Note that in the 512 f
channels occupy the first eight slots; the second eight slots are
empty. The TDM_IN of the first AD1939 must be grounded in
all modes of operation.
The I/O pins of the serial ports are defined according to the
serial mode selected. See Table 13 for a detailed description of
the function of each pin. See Figure 26 for a typical AD1939
configuration with two external stereo DACs and two external
stereo ADCs.
Figure 23 through Figure 25 show the serial mode formats. For
maximum flexibility, the polarity of LRCLK and BCLK are
programmable. In these figures, all of the clocks are shown with
their normal polarity. The default mode is I
DAC L1 DAC R1 DAC L2 DAC R2 DAC L3 DAC R3 DAC L4 DAC R4
8 DAC CHANNELS OF THE SECOND IC IN THE CHAIN
MSB
32 BITS
S
ABCLK mode, the ADC
2
S.
AD1939
S