AD421BR Analog Devices Inc, AD421BR Datasheet - Page 11

• Manufacturer Part Number: AD421BR
• Description: Digital/Analog Converter IC Interface Type:Serial
• Manufacturer: Analog Devices Inc

Specifications of AD421BR

• Number Of Bits: 16
• Package/case: 16-SOIC-WIDE
• Leaded Process Compatible: No
• Features: Loop-Powered 4-20 MA DAC
• Linearity Error (inl): 0.01LSB
• Mounting Type: Surface Mount
• Rohs Status: RoHS non-compliant
• Settling Time: 8µs
• Data Interface: Serial
• Number Of Converters: 1
• Voltage Supply Source: Single Supply
• Power Dissipation (max): 1.95mW
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 16-SOIC (0.300", 7.5mm Width)
• Number Of Channels: 1
• Resolution: 16b
• Interface Type: Serial (3-Wire)
• Single Supply Voltage (typ): 3.3/5V
• Dual Supply Voltage (typ): Not RequiredV
• Architecture: Delta-Sigma
• Power Supply Requirement: Single
• Output Type: Current
• Single Supply Voltage (min): 2.95V
• Single Supply Voltage (max): 5.05V
• Dual Supply Voltage (min): Not RequiredV
• Dual Supply Voltage (max): Not RequiredV
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 16
• Package Type: SOIC W
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

HART Interfacing
The HART protocol uses a frequency shift (FSK) keying tech-
nique based on the Bell 202 Communication Standard which is
one of several standards used to transmit digital signals over
the telephone lines. This technique is used to superimpose
digital communication on to the 4 mA to 20 mA current loop
connecting the central system to the transmitter in the field.
Two different frequencies, 1200 Hz and 2200 Hz, are used to
represent binary 1 and 0 respectively, as shown in Figure 15.
These sine wave tones are superimposed on the dc signal at a
low level with the average value of the sine wave signal being
zero. This allows simultaneous analog and digital communica-
tions. Additionally, no dc component is added to the existing
4 mA to 20 mA signal regardless of the digital data being sent
over the line. Consequently, existing analog instruments con-
tinue to work in systems that implement HART as the low-pass
filtering usually present effectively removes the digital signal. A
single pole 10 Hz low-pass filter effectively reduces the commu-
nication signal to a ripple of about ± 0.01% of the full-scale
signal. The HART protocol specifies that master devices like a
host control system or a hand held terminal transmit a voltage
signal whereas a slave or field device transmits a current signal.
The current signal is converted into a corresponding voltage by
the loop load resistor.
REV. C
APPROX
APPROX
+0.5mA
–0.5mA
Figure 15. HART Transmission of Digital Signals
SENSORS
AMBIENT
mV
SENSOR
TEMP
RTD
TC
0.1 F
1200Hz
“1”
MCLK IN
MCLK OUT
DGND
DV
CONVERTER
AD7714/
AD7715
ANALOG
DIGITAL
DD
DATA OUT
TO
DATA IN
REF IN
AV
AGND
SCLK
DD
CS
Figure 14. AD421 in Smart Transmitter Application
100k
2200Hz
“0”
4.7 F
MICROCONTROLLER
GND
V
CC
–11–
Figure 16 shows a block diagram of a smart and intelligent
transmitter. An intelligent transmitter is a transmitter in which
the functions of the microprocessor are shared between deriving
the primary measurement signal, storing information regarding
the transmitter itself, its application data and its location and
also managing a communication system which enables two way
communication to be superimposed on the same circuit that
carries the measurement signal. A smart transmitter incorporat-
ing the HART protocol is an example of a smart intelligent
transmitter.
Figure 17 shows an example of the AD421 in a HART transmit-
ter application. Most of the circuit is as outlined in the smart
transmitter as shown in Figure 14. The HART data transmitted
on the loop is received by the transmitter using a bandpass filter
and modem and the HART data is transferred to the micro-
controller’s UART or asynchronous serial port. HART data to
be transmitted on the loop is sent from the microcontroller’s
UART or asynchronous serial port to the modem. It is then
waveshaped before being coupled onto the AD421’s output at
the C3 pin. The value of the coupling capacitor C
by the waveshaper output and the C3 capacitor of the AD421. The
blocks containing the Bell 202 Modem, waveshaper and bandpass
filter come in a complete solution with the 20C15 from Symbios
Logic, Inc., or HT2012 from SMAR Research Corp.
For a more complete AD421-20C15 interface, please refer to
Application Note AN-534 on the Analog Devices’ website
www.analog.com or contact your local sales office.
SENSORS
1.25V
Figure 16. Smart and Intelligent Transmitter
3.3V
4.7 F
CONVERTER
2.2 F
A/D
REF IN
REF OUT1
REF OUT2
CLOCK
LATCH
DATA
COM
C1
BOOST
DN25D
C2
PROCESSOR
AD421
MEMORY
MICRO-
V
C3
CC
0.01 F
COMMUNICATION
LV
DRIVE
COMP
LOOP
RTN
SYSTEM
CONVERTER
0.01 F
1000pF
D/A
1k
C
is determined
AD421
POWER
LOOP
4mA TO 20mA
MEASUREMENT
CIRCUIT