AD5422BCPZ-REEL Analog Devices Inc, AD5422BCPZ-REEL Datasheet - Page 11

• Manufacturer Part Number: AD5422BCPZ-REEL
• Description: 16 BIT V, I OUT DAC
• Manufacturer: Analog Devices Inc

Specifications of AD5422BCPZ-REEL

• Design Resources: 16-Bit Fully Isolated Output Module Using AD5422 and ADuM1401 (CN0065) Simplified 16-Bit Voltage Output and 4 mA-to-20 mA Output Solution Using AD5422 (CN0077)
• Settling Time: 25µs
• Number Of Bits: 16
• Data Interface: MICROWIRE™, Serial, SPI™
• Number Of Converters: 1
• Voltage Supply Source: Analog and Digital, Dual ±
• Power Dissipation (max): 950mW
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 40-LFCSP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
Table 6. Pin Function Descriptions
TSSOP
1
2
3
4, 12
18
5
6
7
8
9
10
11
13
14
15
NOTES
1. NC = NO CONNECT
2. THE PADDLE CAN BE CONNECTED TO 0V IF THE OUTPUT VOLTAGE RANGE
IS UNIPOLAR. THE PADDLE CAN BE LEFT ELECTRICALLY UNCONNECTED
PROVIDED THAT A SUPPLY CONNECTION IS MADE AT THE AV
RECOMMENDED THAT THE PADDLE BE THERMALLY CONNECTED TO A
COPPER PLANE FOR ENHANCED THERMAL PERFORMANCE.
CLEAR SELECT
Pin No.
CLEAR
LFCSP
14, 37
39
2
3, 15
1, 10, 11, 19, 20,
21, 22, 25, 30,
31, 35, 38, 40
4
5
6
7
8
9
12, 13
16
17
18
LATCH
FAULT
Figure 5. TSSOP Pin Configuration
SCLK
DV
AV
SDIN
GND
SDO
GND
GND
CC
SS
12
10
11
1
2
3
4
5
6
7
8
9
(Not to Scale)
AD5412/
AD5422
TOP VIEW
Mnemonic
AV
DV
FAULT
GND
NC
CLEAR
SELECT
CLEAR
LATCH
SCLK
SDIN
SDO
GND
R
REFOUT
REFIN
SET
SS
CC
24
19
18
17
16
15
14
13
23
22
21
20
AV
–V
+V
V
BOOST
I
NC
C
DV
REFIN
REFOUT
R
OUT
OUT
COMP
SET
SENSE
SENSE
DD
CC
SELECT
Description
Negative Analog Supply Pin. Voltage ranges from –3 V to –24 V. This pin can be
connected to 0 V if the output voltage range is unipolar.
Digital Supply Pin. Voltage ranges from 2.7 V to 5.5 V.
Fault Alert. This pin is asserted low when an open circuit is detected in current mode or
an overtemperature is detected. Open drain output must be connected to a pull-up resistor.
These pins must be connected to 0 V.
No Connection. Do not connect to these pins.
Selects the voltage output clear value, either zero-scale or midscale code (see Table 21).
Active High Input. Asserting this pin sets the current output to the bottom of the selected
range or sets the voltage output to the user selected value (zero-scale or midscale).
Positive Edge Sensitive Latch. A rising LATCH edge parallel loads the input shift register
data into the DAC register, also updating the output.
Serial Clock Input. Data is clocked into the shift register on the rising edge of SCLK. This
operates at clock speeds of up to 30 MHz.
Serial Data Input. Data must be valid on the rising edge of SCLK.
Serial Data Output. Used to clock data from the serial register in daisy-chain or readback
mode. Data is valid on the rising edge of SCLK (see Figure 3 and Figure 4).
Ground Reference Pin.
An external, precision, low drift 15 kΩ current setting resistor can be connected to this
pin to improve the I
section.
Internal Reference Voltage Output. REFOUT = 5 V ± 2 mV.
External Reference Voltage Input. Reference input range is 4 V to 5 V. REFIN = 5 V for a
specified performance.
SS
PIN. IT IS
Rev. C | Page 11 of 40
OUT
temperature drift performance. See the AD5412/AD5422 Features
CLEAR SELECT
NOTES
1. NC = NO CONNECT.
2. THE EXPOSED PADDLE CAN BE CONNECTED TO 0V IF THE OUTPUT
VOLTAGE RANGE IS UNIPOLAR. THE EXPOSED PADDLE CAN BE LEFT
ELECTRICALLY UNCONNECTED PROVIDED THAT A SUPPLY CONNECTION
IS MADE AT THE AV
THERMALLY CONNECTED TO A COPPER PLANE FOR ENHANCED
THERMAL PERFORMANCE.
CLEAR
LATCH
FAULT
SCLK
SDIN
GND
SDO
NC
NC
10
1
2
3
4
5
6
7
8
9
Figure 6. LFCSP Pin Configuration
SS
AD5412/AD5422
PIN. IT IS RECOMMENDED THAT THE PADDLE BE
PIN 1
INDICATOR
(Not to Scale)
TOP VIEW
AD5412/AD5422
30 NC
29 CAP2
28 CAP1
27 BOOST
26 I
25 NC
24 C
23 DV
22 NC
21 NC
OUT
COMP
CC
SELECT