AD5662ARJ-1REEL7 Analog Devices Inc, AD5662ARJ-1REEL7 Datasheet - Page 17
![IC,D/A CONVERTER,SINGLE,16-BIT,CMOS,TSSOP,8PIN](/photos/6/60/66030/sot-23-8_pkg_sml.jpg)
AD5662ARJ-1REEL7
Manufacturer Part Number
AD5662ARJ-1REEL7
Description
IC,D/A CONVERTER,SINGLE,16-BIT,CMOS,TSSOP,8PIN
Manufacturer
Analog Devices Inc
Series
nanoDAC™r
Datasheet
1.AD5662BRJZ-2REEL7.pdf
(24 pages)
Specifications of AD5662ARJ-1REEL7
Design Resources
4 mA to 20 mA Process Control Loop Using AD5662 (CN0009) 16-Bit Fully Isolated Voltage Output Module Using AD5662, ADuM1401, and External Amplifiers (CN0063) 16-Bit Fully Isolated 4 mA to 20 mA Output Module Using AD5662, ADuM1401, and External Amplifiers (CN0064)
Settling Time
8µs
Number Of Bits
16
Data Interface
DSP, MICROWIRE™, QSPI™, Serial, SPI™
Number Of Converters
1
Voltage Supply Source
Single Supply
Power Dissipation (max)
750µW
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
SOT-23-8
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
AD5662 to 80C51/80L51 Interface
Figure 39 shows a serial interface between the AD5662 and the
80C51/80L51 microcontroller. The setup for the interface is as
follows. TxD of the 80C51/80L51 drives SCLK of the AD5662,
while RxD drives the serial data line of the part. The SYNC
signal is again derived from a bit-programmable pin on the port.
In this case, port line P3.3 is used. When data is to be transmitted
to the AD5662, P3.3 is taken low. The 80C51/80L51 transmits
data in 8-bit bytes only; thus only eight falling clock edges occur
in the transmit cycle. To load data to the DAC, P3.3 is left low
after the first eight bits are transmitted, and a second write cycle
is initiated to transmit the second byte of data. P3.3 is taken
high following the completion of this cycle. The 80C51/80L51
outputs the serial data in a format that has the LSB first. The
AD5662 must receive data with the MSB first. The 80C51/80L51
transmit routine should take this into account.
*ADDITIONAL PINS OMITTED FOR CLARITY
80C51/80L51*
Figure 39. AD5662 to 80C51/80L51 Interface
P3.3
RxD
TxD
AD5662*
SYNC
SCLK
DIN
Rev. A | Page 17 of 24
AD5662 to MICROWIRE Interface
Figure 40 shows an interface between the AD5662 and any
MICROWIRE-compatible device. Serial data is shifted out on
the falling edge of the serial clock and is clocked into the AD5662
on the rising edge of the SK.
*ADDITIONAL PINS OMITTED FOR CLARITY
MICROWIRE*
Figure 40. AD5662 to MICROWIRE Interface
SO
CS
SK
AD5662*
SYNC
SCLK
DIN
AD5662