AD5752RBREZ-REEL7 Analog Devices Inc, AD5752RBREZ-REEL7 Datasheet
AD5752RBREZ-REEL7
Specifications of AD5752RBREZ-REEL7
Related parts for AD5752RBREZ-REEL7
AD5752RBREZ-REEL7 Summary of contents
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FEATURES Complete, dual, 12-/14-/16-bit digital-to-analog converter (DAC) Operates from single/dual supplies Software programmable output range +5 V, +10 V, +10.8 V, ±5 V, ±10 V, ±10.8 V INL error: ±16 LSB maximum, DNL error: ±1 LSB maximum Total unadjusted error ...
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AD5722R/AD5732R/AD5752R TABLE OF CONTENTS Features .............................................................................................. 1 Applications ....................................................................................... 1 General Description ......................................................................... 1 Functional Block Diagram .............................................................. 1 Revision History ............................................................................... 2 Specifications ..................................................................................... 3 AC Performance Characteristics ................................................ 5 Timing Characteristics ................................................................ 6 Timing Diagrams .......................................................................... 7 Absolute ...
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SPECIFICATIONS 4 16 −4 −16 200 pF; all specifications LOAD MIN Table 2. Parameter ACCURACY Resolution AD5752R AD5732R AD5722R ...
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AD5722R/AD5732R/AD5752R Parameter 3 DIGITAL INPUTS Input High Voltage Input Low Voltage Input Current Pin Capacitance DIGITAL OUTPUTS (SDO) 3 Output Low Voltage Output High Voltage Output Low Voltage Output High ...
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AC PERFORMANCE CHARACTERISTICS 4 16 −4 −16 200 pF; all specifications LOAD MIN Table 3. 2 Parameter DYNAMIC PERFORMANCE Output ...
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AD5722R/AD5732R/AD5752R TIMING CHARACTERISTICS −4 −16 200 pF; all specifications LOAD MIN Table Parameter Limit at ...
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TIMING DIAGRAMS SCLK SYNC t 7 SDIN DB23 t 9 LDAC V x OUT V x OUT CLR V x OUT SCLK SYNC t 7 D32B SDIN SDO LDAC t 1 ...
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AD5722R/AD5732R/AD5752R SCLK 1 SYNC DB23 SDIN INPUT WORD SPECIFIES REGISTER TO BE READ DB23 SDO DB0 DB23 DB0 DB23 UNDEFINED Figure 4. Readback Timing Diagram Rev Page DB0 NOP CONDITION ...
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ABSOLUTE MAXIMUM RATINGS T = 25°C unless otherwise noted. Transient currents 100 mA do not cause SCR latch-up. Table 5. Parameter Rating AV to GND −0 + GND +0.3 V ...
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AD5722R/AD5732R/AD5752R PIN CONFIGURATION AND FUNCTION DESCRIPTIONS Table 6. Pin Function Descriptions Pin No. Mnemonic Description 1 AV Negative Analog Supply. Voltage ranges from −4 −16.5 V. This pin can be connected output SS ranges ...
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TYPICAL PERFORMANCE CHARACTERISTICS 6 AV /AV = +12V/0V, RANGE = +10V /AV = ±12V, RANGE = ±10V /AV = ±6.5V, RANGE = ± /AV = +6.5V/0V, RANGE = +5V DD ...
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AD5722R/AD5732R/AD5752R –2 –4 –6 –8 –40 – TEMPERATURE (°C) Figure 12. AD5752R Integral Nonlinearity Error vs. Temperature 0.1 0 –0.1 –0.2 –0.3 –0.4 –0.5 –0.6 –40 – TEMPERATURE (°C) Figure 13. ...
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BIPOLAR 10V MIN 0 UNIPOLAR 10V MIN BIPOLAR 10V MAX UNIPOLAR 10V MAX –0.01 –0.02 –0.03 –0.04 11.5 12.0 12.5 13.0 13.5 14.0 14.5 15.0 SUPPLY VOLTAGE (V) Figure 18. AD5752R Total Unadjusted Error vs. Supply Voltage 0.04 ...
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AD5722R/AD5732R/AD5752R 0.010 ±5V RANGE, CODE = 0xFFFF ±10V RANGE, CODE = 0xFFFF +10V RANGE, CODE = 0xFFFF +5V RANGE, CODE = 0xFFFF 0.005 ±5V RANGE, CODE = 0x0000 ±10V RANGE, CODE = 0x0000 0 –0.005 –0.010 –0.015 –0.020 –25 –20 ...
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RANGE = ±5V RANGE = +10V RANGE = +5V RANGE = ±10V CH1 5µ Figure 30. Peak-to-Peak Noise, 0 Bandwidth 1 RANGE = ±5V RANGE = +10V RANGE = +5V RANGE = ±10V ...
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AD5722R/AD5732R/AD5752R 3.0 2.9 2.8 2.7 2.6 2.5 2.4 2.3 2.2 2.1 2.0 –0.18 –0.13 –0.08 –0.03 0.02 LOAD CURRENT (mA) Figure 36. REFOUT Voltage vs. Load Current 15 AV /AV = +12V/0V, RANGE = +10V /AV = ...
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DEVICES SHOWN 2.50100 2.50080 2.50060 2.50040 2.50020 2.50000 2.49980 –40 – TEMPERATURE (°C) Figure 42. Reference Output Voltage vs. Temperature (−40°C to+ 85°C) 2.50120 2.50100 2.50080 2.50060 2.50040 2.50020 2.50000 2.49980 Figure ...
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AD5722R/AD5732R/AD5752R TERMINOLOGY Relative Accuracy or Integral Nonlinearity (INL) For the DAC, relative accuracy, or integral nonlinearity measure of the maximum deviation in LSBs from a straight line passing through the endpoints of the DAC transfer function. A typical ...
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DAC-to-DAC Crosstalk DAC-to-DAC crosstalk is the glitch impulse transferred to the output of one DAC due to a digital code change and a subsequent output change of another DAC. This includes both digital and analog crosstalk measured by ...
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AD5722R/AD5732R/AD5752R THEORY OF OPERATION The AD5722R/AD5732R/AD5752R are dual, 12-/14-/16-bit, serial input, unipolar/bipolar, voltage output DACs. They operate from unipolar supply voltages of +4 +16 bipolar supply voltages of ±4 ±16 addition, the ...
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Standalone Operation The serial interface works with both a continuous and noncon- tinuous serial clock. A continuous SCLK source can be used only if SYNC is held low for the correct number of clock cycles. In gated clock mode, a ...
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AD5722R/AD5732R/AD5752R LOAD DAC (LDAC) After data has been transferred into the input register of the DACs, there are two ways to update the DAC registers and DAC outputs. Depending on the status of both SYNC and LDAC , one of ...
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Ideal Output Voltage to Input Code Relationship—AD5752R Table 8. Bipolar Output, Offset Binary Coding Digital Input MSB LSB ±5 V Output Range 1111 1111 1111 1111 +2 × REFIN × (32,767/32,768) 1111 1111 1111 1110 +2 × REFIN × (32,766/32,768) ...
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AD5722R/AD5732R/AD5752R Ideal Output Voltage to Input Code Relationship—AD5732R Table 11. Bipolar Output, Offset Binary Coding Digital Input MSB LSB 11 1111 1111 1111 11 1111 1111 1110 … … … … 10 0000 0000 0001 10 0000 0000 0000 01 ...
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Ideal Output Voltage to Input Code Relationship—AD5722R Table 14. Bipolar Output, Offset Binary Coding Digital Input MSB LSB ±5 V Output Range 1111 1111 1111 +2 × REFIN × (2047/2048) 1111 1111 1110 +2 × REFIN × (2046/2048) … … ...
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AD5722R/AD5732R/AD5752R INPUT SHIFT REGISTER The input shift register is 24 bits wide and consists of a read/write bit ( reserved bit (ZERO), which must always be set to 0; three register select bits (REG2, REG1, REG0); three ...
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DAC REGISTER The DAC register is addressed by setting the three REG bits to 000. The DAC address bits select the DAC channel where the data transfer is to take place (see Table 18). The data bits are in positions ...
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AD5722R/AD5732R/AD5752R CONTROL REGISTER The control register is addressed by setting the three REG bits to 011. The value written to the address and data bits determines the control function selected. The control register options are shown in Table 24 and ...
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DESIGN FEATURES ANALOG OUTPUT CONTROL In many industrial process control applications vital that the output voltage be controlled during power-up. When the supply voltages change during power-up, the V clamped via a low impedance path ...
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AD5722R/AD5732R/AD5752R APPLICATIONS INFORMATION +5 V/±5 V OPERATION When operating from a single +5 V supply or a dual ±5 V supply, an output range ± not achievable because sufficient headroom for the output amplifier ...
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... BSC PLANE 0.10 COPLANARITY Figure 51. 24-Lead Thin Shrink Small Outline Package, Exposed Pad [TSSOP_EP] ORDERING GUIDE 1 Model Resolution AD5722RBREZ 12 AD5722RBREZ-REEL7 12 AD5732RBREZ 14 AD5732RBREZ-REEL7 14 AD5752RBREZ 16 AD5752RBREZ-REEL7 RoHS Compliant Part. 5.02 5.00 4.95 13 4.50 EXPOSED 4.40 PAD (Pins Up) 4.30 6.40 BSC 12 BOTTOM VIEW 1.05 1.00 8° ...
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AD5722R/AD5732R/AD5752R NOTES ©2008–2011 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D06466-0-3/11(C) Rev Page ...