AD7147AACBZ-RL Analog Devices Inc, AD7147AACBZ-RL Datasheet
AD7147AACBZ-RL
Specifications of AD7147AACBZ-RL
Related parts for AD7147AACBZ-RL
AD7147AACBZ-RL Summary of contents
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FEATURES Programmable capacitance-to-digital converter (CDC) Femtofarad (fF) resolution 13 capacitance sensor inputs 9 ms update rate, all 13 sensor inputs No external RC components required Automatic conversion sequencer On-chip automatic calibration logic Automatic compensation for environmental changes Automatic adaptive threshold ...
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AD7147A TABLE OF CONTENTS Features .............................................................................................. 1 Applications ....................................................................................... 1 General Description ......................................................................... 1 Functional Block Diagram .............................................................. 1 Revision History ............................................................................... 2 Specifications ..................................................................................... 3 Average Current Specifications .................................................. 4 SPI Timing Specifications (AD7147A) ...................................... ...
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SPECIFICATIONS 2 3 − +85°C, unless otherwise noted Table 1. Parameter CAPACITANCE-TO-DIGITAL CONVERTER Update Rate Resolution CINx Input Range No Missing Codes CINx Input Leakage Maximum Output Load ...
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AD7147A AVERAGE CURRENT SPECIFICATIONS Table 2. Typical Average Current in Low Power Mode Low Power Decimation Mode Delay Rate 1 200 ms 64 22.27 128 27.95 256 39.15 400 ms 64 18.89 128 21.76 256 27.45 600 ms 64 17.76 ...
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SPI TIMING SPECIFICATIONS (AD7147A −40°C to +85°C, sample tested at 25°C to ensure compliance noted. All input signals are specified with t Table 4. SPI Timing Specifications Parameter Limit f 5 SCLK ...
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AD7147A TIMING SPECIFICATIONS (AD7147A- −40°C to +85°C, sample tested at 25°C to ensure compliance noted. All input signals timed from a voltage level of 1 Table Timing ...
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ABSOLUTE MAXIMUM RATINGS Table 6. Parameter V to GND CC Analog Input Voltage to GND Digital Input Voltage to GND Digital Output Voltage to GND 1 Input Current to Any Pin Except Supplies ESD Rating BIAS and AC Pins (HBM ...
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AD7147A PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS BALL A1 INDICATOR INT GPIO CIN1 CIN3 CIN2 CIN6 B SCLK V CIN4 CIN8 DRIVE C SDI V CIN0 CIN10 CIN11 CC D SDO GND BIAS AC ...
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TYPICAL PERFORMANCE CHARACTERISTICS 935 915 895 DECIMATION = 64 875 DECIMATION = 128 855 835 815 795 2.6 2.7 2.8 2.9 3.0 3.1 3.2 3.3 V (V) CC Figure 7. Supply Current vs. Supply Voltage 180 200ms 160 140 120 ...
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AD7147A 58,000 56,000 54,000 52,000 50,000 48,000 46,000 44,000 42,000 40,000 0 100 200 300 AC CAPACITIVE LOAD (pF) SHIELD Figure 13. CDC Code vs. Capacitive Load on AC 960 940 3.6V 920 900 3.3V 880 860 840 820 2.6V ...
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THEORY OF OPERATION The AD7147A and AD7147A-1 are CDCs with on-chip environ- mental compensation. They are intended for use in portable systems requiring high resolution user input. The internal circuitry consists of a 16-bit, Σ-Δ converter that can change a ...
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AD7147A Registering a Sensor Activation When a user approaches a sensor, the total capacitance associated with that sensor changes and is measured by the AD7147A. If the change causes a set threshold to be exceeded, the AD7147A interprets this as ...
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Full Power Mode In full power mode, all sections of the AD7147A remain fully powered and converting at all times. While a sensor is being touched, the AD7147A processes the sensor data sensor is touched, the AD7147A measures ...
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AD7147A CAPACITANCE-TO-DIGITAL CONVERTER The capacitance-to-digital converter on the AD7147A has a Σ-Δ architecture with 16-bit resolution. There are 13 possible inputs to the CDC that are connected to the input of the converter through a switch matrix. The sampling frequency ...
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A button sensor generally requires one sequencer stage; this is shown in Figure 25 as B1. However possible to configure two button sensors to operate differentially for one conversion stage. Only one button can be activated at a ...
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AD7147A CDC CONVERSION SEQUENCE TIME Table 10. CDC Conversion Times for Full Power Mode SEQUENCE_STAGE_NUM Decimation = 64 0 0.768 1 1.536 2 2.304 3 3.072 4 3.84 5 4.608 6 5.376 7 6.144 8 6.912 9 7.68 10 8.448 ...
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CAPACITANCE SENSOR INPUT CONFIGURATION Each input connection from the external capacitance sensors to the converter of the AD7147A can be uniquely configured by using the stage configuration registers in Bank 2 (see Table 39). These registers are used to configure ...
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AD7147A NONCONTACT PROXIMITY DETECTION The AD7147A internal signal processing continuously monitors all capacitance sensors for noncontact proximity detection. This feature provides the ability to detect when a user is approaching a sensor, at which time all internal calibration is immediately ...
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Table 13. Proximity Control Registers (See Figure 33) Length Bit Name (Bits) FP_PROXIMITY_CNT 4 LP_PROXIMITY_CNT 4 FP_PROXIMITY_RECAL 10 LP_PROXIMITY_RECAL 6 PROXIMITY_RECAL_LVL 8 PROXIMITY_DETECTION_RATE 6 USER APPROACHES SENSOR CDC CONVERSION ...
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AD7147A USER APPROACHES SENSOR USER LEAVES SENSOR AREA CDC CONVERSION SEQUENCE (INTERNAL) PROXIMITY DETECTION (INTERNAL) CALIBRATION CALIBRATION DISABLED (INTERNAL) RECALIBRATION COUNTER (INTERNAL) NOTES 1. SEQUENCE CONVERSION TIME × FP_PROXIMITY_CNT × 16. CALDIS CONV_FP ...
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FF_SKIP_CNT The proximity detection fast FIFO is used by the on-chip logic to determine if proximity is detected. The fast FIFO expects to receive samples from the converter at a set rate. The fast filter skip control, FF_SKIP_CNT (Bits[3:0], Address ...
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AD7147A 16 CDC STAGEx_FF_WORD0 STAGEx_FF_WORD1 STAGEx_FF_WORD2 STAGEx_FF_WORD3 STAGEx_FF_WORD4 STAGEx_FF_WORD5 STAGEx_FF_WORD6 STAGEx_FF_WORD7 BANK 3 REGISTERS 7 Σ WORD( PROXIMITY SLOW_FILTER_EN COMPARATOR 3 STAGEx_SF_WORD0 |WORD0 – CDC VALUE| STAGEx_SF_WORD1 STAGEx_SF_WORD2 STAGEx_SF_WORD3 SLOW_FILTER_UPDATE_LVL STAGEx_SF_WORD4 REGISTER 0x003 STAGEx_SF_WORD5 STAGEx_SF_WORD6 STAGEx_SF_WORD7 ...
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ENVIRONMENTAL CALIBRATION The AD7147A provides on-chip capacitance sensor calibration to automatically adjust for environmental conditions that have an effect on the ambient levels of the capacitance sensor. The output levels of the capacitance sensor are sensitive to tempera- ture, humidity, ...
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AD7147A CAPACITANCE SENSOR BEHAVIOR WITH CALIBRATION The AD7147A on-chip adaptive calibration algorithm prevents sensor detection errors such as the one shown in Figure 35. This is achieved by monitoring the CDC ambient levels and readjusting the initial STAGEx_OFFSET_HIGH and STAGEx_ ...
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ADAPTIVE THRESHOLD AND SENSITIVITY The AD7147A provides an on-chip, self-adjusting adaptive threshold and sensitivity algorithm. This algorithm continu- ously monitors the output levels of each sensor and automatically rescales the threshold levels in proportion to the sensor area covered by ...
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AD7147A Σ-Δ 16 16-BIT CDC Figure 38. Tracking the Minimum and Maximum Average Sensor Values Table 15. Additional Information About Environmental Calibration and Adaptive Threshold Registers Register Register/Bit Location NEG_THRESHOLD_SENSITIVITY Bank 2 NEG_PEAK_DETECT Bank 2 POS_THRESHOLD_SENSITIVITY Bank 2 POS_PEAK_DETECT Bank ...
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INTERRUPT OUTPUT The AD7147A has an interrupt output that triggers an interrupt service routine on the host processor. The INT signal is on Pin A1 and is an open-drain output. There are three types of interrupt events on the AD7147A: ...
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AD7147A STAGE0 STAGE1 STAGE2 CONVERSIONS INT 1 SERIAL READS NOTES THIS IS AN EXAMPLE OF A CDC CONVERSION-COMPLETE INTERRUPT. THIS TIMING EXAMPLE SHOWS THAT THE INTERRUPT OUTPUT HAS BEEN ENABLED TO BE ASSERTED AT THE END OF A CONVERSION CYCLE ...
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GPIO INT OUTPUT CONTROL The INT output signal can be controlled by the GPIO pin when the GPIO is configured as an input. The GPIO is configured as an input by setting the GPIO_SETUP bits in the interrupt enable register ...
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AD7147A SERIAL READBACK GPIO INPUT HIGH WHEN REGISTER IS READ BACK GPIO INPUT INT OUTPUT GPIO INPUT LOW WHEN REGISTER IS READ BACK GPIO INPUT INT OUTPUT 1 READ GPIO_INT_STATUS BIT TO RESET INT OUTPUT. Figure 42. Example of INT ...
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OUTPUTS AC OUTPUT SHIELD The AD7147A measures the capacitance between CINx and ground. Any capacitance to ground on the signal path between the CINx pins and the sensor is included in the AD7147A conversion result. To eliminate stray capacitance to ...
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AD7147A SERIAL INTERFACES The AD7147A is available with an SPI interface. The AD7147A available with an I C-compatible interface. Both parts are the same, with the exception of the serial interface. SPI INTERFACE The AD7147A has a 4-wire ...
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COMMAND WORD ENABLE WORD R SDI SCLK NOTES 1. MULTIPLE SEQUENTIAL REGISTERS CAN BE LOADED CONTINUOUSLY. ...
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AD7147A 16-BIT COMMAND WORD ENABLE WORD R SDI SCLK SDO XXX XXX XXX XXX XXX XXX XXX ...
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START AD7147A-1 DEVICE ADDRESS SDA DEV DEV DEV DEV DEV SCLK REGISTER DATA [D15:D8] ACK D15 D14 NOTES 1. A START CONDITION ...
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AD7147A START AD7147A-1 DEVICE ADDRESS SDA DEV DEV DEV DEV DEV SCLK AD7147A-1 DEVICE ADDRESS SR DEV DEV A6 A5 USING REPEATED START ...
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PCB DESIGN GUIDELINES CAPACITIVE SENSOR BOARD MECHANICAL SPECIFICATIONS Table 20. Parameter Distance from Edge of Any Sensor to Edge of Grounded Metal Object 1 Distance Between Sensor Edges Distance Between Bottom of Sensor Board and Controller Board or Grounded 2 ...
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AD7147A POWER-UP SEQUENCE To power up the AD7147A, use the following sequence when initially developing the AD7147A and microprocessor serial interface: 1. Turn on the power supplies to the AD7147A. 2. Write to the Bank 2 registers at Address 0x080 ...
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TYPICAL APPLICATION CIRCUITS V DRIVE 2.2kΩ HOST WITH SPI INTERFACE INT INT CS SS SCK SCLK MOSI MISO SDI V HOST SDO 1.8V AD7147A V 2.7V TO 3.6V CC 1μF TO 10μF (OPTIONAL) V DRIVE V DRIVE 2 HOST WITH ...
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AD7147A REGISTER MAP The AD7147A address space is divided into three register banks, referred to as Bank 1, Bank 2, and Bank 3. Figure 61 illustrates the division of these banks. Bank 1 registers contain control registers, CDC conversion control ...
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DETAILED REGISTER DESCRIPTIONS BANK 1 REGISTERS All addresses and default values are expressed in hexadecimal. Table 21. PWR_CONTROL Register Default Address Data Bit Value 0x000 [1:0] 0 [3:2] 0 [7:4] 0 [9:8] 0 [10] 0 [11] 0 [12] 0 [13] ...
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AD7147A Table 22. STAGE_CAL_EN Register Default Address Data Bit Value Type 0x001 [0] 0 R/W [1] 0 R/W [2] 0 R/W [3] 0 R/W [4] 0 R/W [5] 0 R/W [6] 0 R/W [7] 0 R/W [8] 0 R/W [9] ...
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Table 23. AMB_COMP_CTRL0 Register Default Address Data Bit Value Type 0x002 [3:0] 0 R/W [7:4] F R/W [11:8] F R/W [13:12] 0 R/W [14] 0 R/W [15] 0 R/W Table 24. AMB_COMP_CTRL1 Register Default Address Data Bit Value Type 0x003 ...
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AD7147A Table 26. STAGE_LOW_INT_ENABLE Register Default Address Data Bit Value Type 0x005 [0] 0 R/W [1] 0 R/W [2] 0 R/W [3] 0 R/W [4] 0 R/W [5] 0 R/W [6] 0 R/W [7] 0 R/W [8] 0 R/W [9] ...
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Table 27. STAGE_HIGH_INT_ENABLE Register Default Address Data Bit Value Type 0x006 [0] 0 R/W [1] 0 R/W [2] 0 R/W [3] 0 R/W [4] 0 R/W [5] 0 R/W [6] 0 R/W [7] 0 R/W [8] 0 R/W [9] 0 ...
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AD7147A Table 28. STAGE_COMPLETE_INT_ENABLE Register Default Address Data Bit Value Type 0x007 [0] 0 R/W [1] 0 R/W [2] 0 R/W [3] 0 R/W [4] 0 R/W [5] 0 R/W [6] 0 R/W [7] 0 R/W [8] 0 R/W [9] ...
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Table 29. STAGE_LOW_INT_STATUS Register Default Address Data Bit Value Type 0x008 [ [ [ [ [ [ [ [ [ [9] 0 ...
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AD7147A Table 30. STAGE_HIGH_INT_STATUS Register Default Address Data Bit Value Type 0x009 [ [ [ [ [ [ [ [ [ [9] ...
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Table 31. STAGE_COMPLETE_INT_STATUS Register Default Address Data Bit Value Type 0x00A [ [ [ [ [ [ [ [ [ [9] 0 ...
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AD7147A Table 33. Device ID Register Default Address Data Bit Value Type 0x017 [3: [15:4] 147 R Table 34. Proximity Status Register Default Value Address Data Bit Type 0x042 [ [ [ ...
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BANK 2 REGISTERS All address values are expressed in hexadecimal. Table 35. STAGEx_CONNECTION[6:0] Register Description ( 11) Default 1 Data Bit Value Type Name [1:0] X R/W CIN0_CONNECTION_SETUP [3:2] X R/W CIN1_CONNECTION_SETUP [5:4] X R/W CIN2_CONNECTION_SETUP [7:6] ...
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AD7147A Table 36. STAGEx_CONNECTION[12:7] Register Description ( 11) Default Data Bit Value 1 Type Name [1:0] X R/W CIN7_CONNECTION_SETUP [3:2] X R/W CIN8_CONNECTION_SETUP [5:4] X R/W CIN9_CONNECTION_SETUP [7:6] X R/W CIN10_CONNECTION_SETUP [9:8] X R/W CIN11_CONNECTION_SETUP [11:10] X ...
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Table 37. STAGEx_AFE_OFFSET Register Description ( 11) Default Data Bit Value 1 Type Name [5:0] X R/W NEG_AFE_OFFSET [6] X Unused [7] X R/W NEG_AFE_OFFSET_SWAP [13:8] X R/W POS_AFE_OFFSET [14] X Unused [15] X R/W POS_AFE_OFFSET_SWAP 1 ...
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AD7147A Table 39. STAGE0 to STAGE12 Configuration Registers 1 Address Data Bit Default Type 0x080 [15:0] X R/W 0x081 [15:0] X R/W 0x082 [15:0] X R/W 0x083 [15:0] X R/W 0x084 [15:0] X R/W 0x085 [15:0] X R/W 0x086 [15:0] ...
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Address Data Bit Default Type 0x0B0 [15:0] X R/W 0x0B1 [15:0] X R/W 0x0B2 [15:0] X R/W 0x0B3 [15:0] X R/W 0x0B4 [15:0] X R/W 0x0B5 [15:0] X R/W 0x0B6 [15:0] X R/W 0x0B7 [15:0] X R/W 0x0B8 [15:0] ...
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AD7147A BANK 3 REGISTERS All address values are expressed in hexadecimal. Table 40. STAGE0 Results Registers Default 1 Address Data Bit Value Type 0x0E0 [15:0] X R/W 0x0E1 [15:0] X R/W 0x0E2 [15:0] X R/W 0x0E3 [15:0] X R/W 0x0E4 ...
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Table 41. STAGE1 Results Registers Default Address Data Bit Value 1 Type 0x104 [15:0] X R/W 0x105 [15:0] X R/W 0x106 [15:0] X R/W 0x107 [15:0] X R/W 0x108 [15:0] X R/W 0x109 [15:0] X R/W 0x10A [15:0] X R/W ...
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AD7147A Table 42. STAGE2 Results Registers Default Address Data Bit Value 1 Type 0x128 [15:0] X R/W 0x129 [15:0] X R/W 0x12A [15:0] X R/W 0x12B [15:0] X R/W 0x12C [15:0] X R/W 0x12D [15:0] X R/W 0x12E [15:0] X ...
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Table 43. STAGE3 Results Registers Default Address Data Bit Value 1 Type 0x14C [15:0] X R/W 0x14D [15:0] X R/W 0x14E [15:0] X R/W 0x14F [15:0] X R/W 0x150 [15:0] X R/W 0x151 [15:0] X R/W 0x152 [15:0] X R/W ...
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AD7147A Table 44. STAGE4 Results Registers Default Address Data Bit Value 1 Type 0x170 [15:0] X R/W 0x171 [15:0] X R/W 0x172 [15:0] X R/W 0x173 [15:0] X R/W 0x174 [15:0] X R/W 0x175 [15:0] X R/W 0x176 [15:0] X ...
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Table 45. STAGE5 Results Registers Default Address Data Bit Value 1 Type 0x194 [15:0] X R/W 0x195 [15:0] X R/W 0x196 [15:0] X R/W 0x197 [15:0] X R/W 0x198 [15:0] X R/W 0x199 [15:0] X R/W 0x19A [15:0] X R/W ...
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AD7147A Table 46. STAGE6 Results Registers Default Address Data Bit Value 1 Type 0x1B8 [15:0] X R/W 0x1B9 [15:0] X R/W 0x1BA [15:0] X R/W 0x1BB [15:0] X R/W 0x1BC [15:0] X R/W 0x1BD [15:0] X R/W 0x1BE [15:0] X ...
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Table 47. STAGE7 Results Registers Default Address Data Bit Value 1 Type 0x1DC [15:0] X R/W 0x1DD [15:0] X R/W 0x1DE [15:0] X R/W 0x1DF [15:0] X R/W 0x1E0 [15:0] X R/W 0x1E1 [15:0] X R/W 0x1E2 [15:0] X R/W ...
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AD7147A Table 48. STAGE8 Results Registers Default Address Data Bit Value 1 Type 0x200 [15:0] X R/W 0x201 [15:0] X R/W 0x202 [15:0] X R/W 0x203 [15:0] X R/W 0x204 [15:0] X R/W 0x205 [15:0] X R/W 0x206 [15:0] X ...
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Table 49. STAGE9 Results Registers Default Address Data Bit Value 1 Type 0x224 [15:0] X R/W 0x225 [15:0] X R/W 0x226 [15:0] X R/W 0x227 [15:0] X R/W 0x228 [15:0] X R/W 0x229 [15:0] X R/W 0x22A [15:0] X R/W ...
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AD7147A Table 50. STAGE10 Results Registers Default Address Data Bit Value 1 Type 0x248 [15:0] X R/W 0x249 [15:0] X R/W 0x24A [15:0] X R/W 0x24B [15:0] X R/W 0x24C [15:0] X R/W 0x24D [15:0] X R/W 0x24E [15:0] X ...
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Table 51. STAGE11 Results Registers Default Address Data Bit Value 1 Type 0x26C [15:0] X R/W 0x26D [15:0] X R/W 0x26E [15:0] X R/W 0x26F [15:0] X R/W 0x270 [15:0] X R/W 0x271 [15:0] X R/W 0x272 [15:0] X R/W ...
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... AD7147A OUTLINE DIMENSIONS 2.295 2.245 2.195 BALL 1 IDENTIFIER TOP VIEW (BALL SIDE DOWN) ORDERING GUIDE Temperature Model Range 1, 2 AD7147AACBZ-RL −40°C to +85° AD7147AACBZ500RL7 −40°C to +85° AD7147A-1ACBZ-RL −40°C to +85° AD7147A-1ACBZ500RL7 −40°C to +85°C 1 EVAL-AD7147EBZ 1 EVAL-AD7147-1EBZ RoHS Compliant Part ...