AD7147PACPZ-1RL Analog Devices Inc, AD7147PACPZ-1RL Datasheet - Page 37

• Manufacturer Part Number: AD7147PACPZ-1RL
• Description: CAPACITANCE TO DIGITAL CONVERTER
• Manufacturer: Analog Devices Inc
• Series: CapTouch™r
• Type: Capacitive Sensor Controllerr

Specifications of AD7147PACPZ-1RL

• Resolution (bits): 16 b
• Data Interface: I²C, Serial
• Voltage Supply Source: Single Supply
• Voltage - Supply: 2.6 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 24-LFCSP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Sampling Rate (per Second): -
• Lead Free Status / Rohs Status: Compliant

WRITE TRANSACTIONS
V
The supply voltage for the pins (SDO, SDI, SCLK, SDA, CS ,
INT , and GPIO) associated with both the I
interfaces is supplied from the V
main V
WRITE
READ (USING REPEATED START)
SEPARATE READ AND
S
READ (WRITE TRANSACTION SETS UP REGISTER ADDRESS)
S
S
DRIVE
6-BIT DEVICE
6-BIT DEVICE
REPEATED START
6-BIT DEVICE
ADDRESS
ADDRESS
SCLK
ADDRESS
OUTPUT FROM MASTER
OUTPUT FROM AD7147-1
SDA
INPUT
CC
START
NOTES
1. A START CONDITION AT THE BEGINNING IS DEFINED AS A HIGH-TO-LOW TRANSITION ON SDA WHILE SCLK REMAINS HIGH.
2. A STOP CONDITION AT THE END IS DEFINED AS A LOW-TO-HIGH TRANSITION ON SDA WHILE SCLK REMAINS HIGH.
3. THE MASTER GENERATES THE ACK AT THE END OF THE READBACK TO SIGNAL THAT IT DOES NOT WANT ADDITIONAL DATA.
4. 7-BIT DEVICE ADDRESS [DEV A6:DEV A0] = [0 1 0 1 1 X X], WHERE THE TWO LSB Xs ARE DON'T CARE BITS.
5. 16-BIT REGISTER ADDRESS [A15:A0] = [X, X, X, X, X, X, A9, A8, A7, A6, A5, A4, A3, A2, A1, A0], WHERE THE UPPER LSB Xs ARE DON’T CARE BITS.
6. REGISTER ADDRESS [A15:A8] AND REGISTER ADDRESS [A7:A0] ARE ALWAYS SEPARATED BY LOW ACK BITS.
7. REGISTER DATA [D15:D8] AND REGISTER DATA [D7:D0] ARE ALWAYS SEPARATED BY A LOW ACK BIT.
8. THE R/W BIT IS SET TO A1 TO INDICATE A READBACK OPERATION.
supply.
USING
W
W
W
t
1
REGISTER ADDR
REGISTER ADDR
REGISTER ADDR
DEV
A6
HIGH BYTE
HIGH BYTE
1
[15:8]
DEV
AD7147-1 DEVICE ADDRESS
A5
SR
2
28
S = START BIT
P = STOP BIT
SR = REPEATED START BIT
P
DEV
A4
DEV
A6
3
DRIVE
29
DEV
28
REGISTER ADDR
REGISTER ADDR
S
A3
REGISTER ADDR
t
AD7147-1 DEVICE ADDRESS
2
DEV
A5
4
LOW BYTE
pin and is separate from the
LOW BYTE
30
DEV
A6
DEV
[7:0]
A2
29
Figure 54. Example of I
5
Figure 55. Example of Sequential I
AD7147-1 DEVICE ADDRESS
DEV
2
DEV
A5
C and SPI serial
A1
30
6
t
3
DEV
A0
DEV
HIGH BYTE [15:8]
7
A1
ACK = ACKNOWLEDGE BIT
ACK = NO ACKNOWLEDGE BIT
P
WRITE DATA
34
6-BIT DEVICE
R/W
ADDRESS
DEV
S
8
A0
t
4
35
DEV
6-BIT DEVICE
ACK
A1
ADDRESS
34
R/W
9
2
C Timing for Single Register Readback Operation
36
DEV
A0
A15
Rev. B | Page 37 of 72
t
4
35
ACK
10
REGISTER ADDRESS [A15:A8]
37
LOW BYTE [7:0]
R/W
HIGH BYTE [15:8]
WRITE DATA
A14
36
READ DATA
11
D7
38
ACK
2
C Write and Readback Operations
HIGH BYTE [15:8]
REGISTER DATA [D7:D0]
37
READ DATA
D6
39
t
5
This allows the AD7147 to be connected directly to processors
whose supply voltage is less than the minimum operating
voltage of the AD7147 without the need for external level-
shifters. The V
low as 1.65 V and as high as V
D7
38
REGISTER DATA [D7:D0]
D6
A9
39
LOW BYTE [7:0]
t
HIGH BYTE [15:8]
5
16
READ DATA
WRITE DATA
A8
LOW BYTE [7:0]
17
D1
READ DATA
44
ACK
DRIVE
18
D0
45
D1
A7
pin can be connected to voltage supplies as
44
ACK
19
REGISTER ADDRESS [A7:A0]
46
LOW BYTE [7:0]
HIGH BYTE [15:8]
D0
WRITE DATA
A6
READ DATA
45
20
ACK
t
HIGH BYTE [15:8]
6
P
46
READ DATA
CC
.
t
8
P
P
A1
LOW BYTE [7:0]
25
t
READ DATA
7
A0
AD7147-1 DEVICE ADDRESS
LOW BYTE [7:0]
26
READ DATA
DEV
ACK
A6
27
1
DEV
ACK
A5
AD7147
2
P
DEV
A4
ACK
3
P