AD7376ARUZ100-R7 Analog Devices Inc, AD7376ARUZ100-R7 Datasheet - Page 12
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AD7376ARUZ100-R7
Manufacturer Part Number
AD7376ARUZ100-R7
Description
IC,Digital Potentiometer,CMOS,TSSOP,14PIN,PLASTIC
Manufacturer
Analog Devices Inc
Datasheet
1.AD7376ARWZ100.pdf
(20 pages)
Specifications of AD7376ARUZ100-R7
Taps
128
Resistance (ohms)
100K
Number Of Circuits
1
Temperature Coefficient
300 ppm/°C Typical
Memory Type
Volatile
Interface
SPI, 3-Wire Serial
Voltage - Supply
4.5 V ~ 33 V, ±4.5 V ~ 16.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
14-TSSOP
Resistance In Ohms
100K
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
EVAL-AD7376EBZ - BOARD EVAL FOR AD7376
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
AD7376ARUZ100-R7TR
AD7376
THEORY OF OPERATION
PROGRAMMING THE VARIABLE RESISTOR
Rheostat Operation
The part operates in rheostat mode when only two terminals
are used as a variable resistor. The unused terminal can be left
floating or tied to the W terminal as shown in Figure 24.
The nominal resistance between Terminals A and B, R
available in 10 kΩ, 50 kΩ, and 100 kΩ with ±30% tolerance and
has 128 tap points accessed by the wiper terminal. The 7-bit
data in the RDAC latch is decoded to select one of the 128
possible settings. Figure 25 shows a simplified RDAC structure.
The general equation determining the digitally programmed
output resistance between the W and the B terminals is
where:
D is the decimal equivalent of the binary code loaded in the
7-bit RDAC register from 0 to 127.
R
R
the internal switch.
AB
W
is the wiper resistance contributed by the on resistance of
is the end-to-end resistance.
R
WB
A
B
D6
D5
D4
D3
D2
D1
D0
(
SHDN
DECODER
D
LATCH
RDAC
)
AND
=
Figure 25. AD7376 Equivalent RDAC Circuit
W
Figure 24. Rheostat Mode Configuration
128
D
×
R
AB
R
R
R
R
A
B
S
S
S
S
+
R
W
R
S
W
0x01
= R
0x7F
NOMINAL
0x00
SW
A
/128
A
B
SW
B
W
A
W
B
AB
, is
Rev. C | Page 12 of 20
(1)
The AD7376 wiper switches are designed with the transmission
gate CMOS topology, and the gate voltage is derived from the
V
temperature (see Figure 13).
Contrary to the temperature coefficient of R
coefficient of the wiper resistance is significantly higher because
the wiper resistance doubles with every 100° increase. As a result,
the user must take into consideration the contribution of R
the desirable resistance. On the other hand, each switch’s on
resistance is insensitive to the tap point potential and remains
relatively flat at 120 Ω typical at a V
temperature of 25°C.
Assuming that a 10 kΩ part is used, the wiper’s first connection
starts at the B terminal for programming code 0x00, where SW
is closed. The minimum resistance between Terminals W and B
is therefore 120 Ω in general. The second connection is the first
tap point, which corresponds to 198 Ω ( R
= 78 Ω + 120 Ω) for programming code 0x01, and so on.
Each LSB data value increase moves the wiper up the resistor
ladder until the last tap point is reached at 10,042 Ω ( R
R
should be taken to limit the current conducted between any A
and B, W and A, or W and B terminals to a maximum dc
current of 5 mA and a maximum pulse current of 20 mA.
Otherwise, degradation or possible destruction of the internal
switch contact can occur.
Similar to the mechanical potentiometer, the resistance of the
RDAC between the W and A terminals also produces a digitally
controlled complementary resistance, R
When these terminals are used, the B terminal can be opened.
Setting the resistance value for R
of resistance and decreases as the data loaded into the latch
increases in value. The general equation for this operation is
W
DD
). Regardless of which settings the part is operating with, care
. Each switch’s on resistance, R
R
WA
(
D
)
=
128
128
−
D
×
R
AB
+
R
WA
W
W
starts at a maximum value
DD
, is a function of V
of 15 V and a
WA
WB
.
AB
= 1/128 × R
, the temperature
AB
– 1 LSB +
DD
AB
and
W
+ R
on
(2)
W
B