AD7397ARZ-REEL Analog Devices Inc, AD7397ARZ-REEL Datasheet - Page 9

• Manufacturer Part Number: AD7397ARZ-REEL
• Description: /n 10-Bit, +3V UPwr DAC
• Manufacturer: Analog Devices Inc

Specifications of AD7397ARZ-REEL

• Settling Time: 60µs
• Number Of Bits: 10
• Data Interface: Parallel
• Number Of Converters: 2
• Voltage Supply Source: Single Supply
• Power Dissipation (max): 1mW
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 24-SOIC (7.5mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

REV. 0
OPERATION
The AD7396 and AD7397 are a set of pin compatible, 12-bit
and 10-bit digital-to-analog converters. These single-supply
operation devices consume less than 200 A of current while
operating from power supplies in the +2.7 V to +5.5 V range,
making them ideal for battery operated applications. They
contain a voltage-switched, 12-bit/10-bit, digital-to-analog
converter, rail-to-rail output op amps, and a parallel-input
DAC register. The external reference input has constant
2.5 M
setting of the DAC. In addition, the reference input can be tied
to the same supply voltage as V
output voltage span of 0 to V
consists of 12 data bits, DB0–DB11, for the AD7396, 10 data
bits, DB0–DB9, for the AD7397, and a CS write strobe. An RS
pin is available to reset the DAC register to zero scale. This
function is useful for power-on reset or system failure recovery
to a known state. Additional power savings are accomplished by
activating the SHDN pin resulting in a 1.5 A maximum con-
sumption sleep mode. As long as the supply voltage, remains
data will be retained in the DAC and input register to supply
the DAC output when the part is taken out of shutdown.
D/A CONVERTER SECTION
The voltage switched R-2R DAC generates an output voltage
dependent on the external reference voltage connected to the
REF pin according to the following equation:
DATA
LDA
LDB
A/B
1400
1200
1000
CS
800
600
400
200
Figure 22. I
Frequency
0
1k
A: V
B: V
C: V
D: V
AD7396
AD7396
input resistance independent of the digital code
DIGITAL INPUT FREQUENCY – Hz
DD
DD
DD
DD
Figure 25. Functional Block Diagram
= +2.7V, CODE = 555
= +2.7V, CODE = 3FF
= +5.5V, CODE = 155
= +5.5V, CODE = 3FF
10k
DGND
DD
vs. Digital Input
100k
12
REGISTER
REGISTER
REGISTER
REGISTER
INPUTA
INPUTB
DACA
DACB
H
H
H
H
C
1M
DD
D
DD
. The parallel data interface
RS
B
1
12
12
resulting in a maximum
A
10M
12-BIT
DACA
12-BIT
DACB
80
70
60
50
40
30
20
10
Figure 23. PSRR vs. Frequency
0
1
V
DD
SHDN
= +3V,
10
V
V
V
V
AGND
DD
OUTA
REF
OUTB
FREQUENCY – Hz
V
5%
DD
–9–
= +5V,
100
where D is the decimal data word loaded into the DAC register,
and N is the number of bits of DAC resolution. In the case of
the 10-bit AD7397 using a 2.5 V reference, Equation 1 simpli-
fies to:
Using Equation 2, the nominal midscale voltage at V
1.25 V for D = 512; full-scale voltage is 2.497 V. The LSB step
size is = 2.5
For the 12-bit AD7396 operating from a 5.0 V reference equa-
tion [1] becomes:
Using Equation 3, the AD7396 provides a nominal midscale
voltage of 2.50 V for D = 2048, and a full-scale output of
4.998 V. The LSB step size is = 5.0 1/4096 = 0.0012 V.
AMPLIFIER SECTION
The internal DAC’s output is buffered by a low power con-
sumption precision amplifier. The op amp has a 60 s typical
settling time to 0.1% of full scale. There are slight differences in
settling time for negative slewing signals versus positive. Also,
negative transition settling time to within the last 6 LSBs of zero
volts has an extended settling time. The rail-to-rail output stage
of this amplifier has been designed to provide precision perfor-
mance while operating near either power supply. Figure 26
shows an equivalent output schematic of the rail-to-rail-ampli-
fier with its N-channel pull-down FETs that will pull an output
load directly to GND. The output sourcing current is provided
by a P-channel pull-up device that can source current to GND
terminated loads.
5%
V
V
V
1k
OUT
OUT
OUT
Figure 26. Equivalent Analog Output Circuit
= V
= 2.5
= 5.0
10k
REF
1/1024 = 0.0024 V.
D/1024
D/4096
D/2
Figure 24. Long-Term Drift Acceler-
ated by Burn-In
N
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
0
AD7396
SAMPLE SIZE = 77
V
REF
HOURS OF OPERATION AT +150 C
N-ch
P-ch
100
AD7396/AD7397
= +2.5V
CODE = 000
CODE = FFF
200
300
V
V
AGND
DD
OUT
H
H
400
OUT
500
is
600
(1)
(2)
(3)