AD7863ARZ-2 Analog Devices Inc, AD7863ARZ-2 Datasheet - Page 10

• Manufacturer Part Number: AD7863ARZ-2
• Description: IC,Data Acquisition System,2-CHANNEL,14-BIT,SOP,28PIN,PLASTIC
• Manufacturer: Analog Devices Inc

Specifications of AD7863ARZ-2

• Number Of Bits: 14
• Sampling Rate (per Second): 175k
• Data Interface: Parallel
• Number Of Converters: 2
• Power Dissipation (max): 94.5mW
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 28-SOIC (0.300", 7.50mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AD7863
CIRCUIT DESCRIPTION
ANALOG INPUT SECTION
The AD7863 is offered as three part types: the AD7863-10,
which handles a ±10 V input voltage range, the AD7863-3,
which handles input voltage range ±2.5 V and the AD7863-2,
which handles a 0 V to 2.5 V input voltage range.
Figure 5 shows the analog input section for the AD7863-10 and
AD7863-3. The analog input range of the AD7863-10 is ±10 V
into an input resistance of typically 9 kΩ. The analog input
range of the AD7863-3 is ±2.5 V into an input resistance of
typically 3 kΩ. This input is benign, with no dynamic charging
currents because the resistor stage is followed by a high input
impedance stage of the track-and-hold amplifier. For the
AD7863-10, R1 = 8 kΩ, R2 = 2 kΩ and R3 = 2 kΩ. For the
AD7863-3, R1 = R2 = 2 kΩ and R3 is open circuit.
For the AD7863-10 and AD7863-3, the designed code
transitions occur on successive integer LSB values (that is, 1 LSB,
2 LSBs, 3 LSBs . . .). Output coding is twos complement binary
with 1 LSB = FS/16,384. The ideal input/output transfer
function for the AD7863-10 and AD7863-3 is shown in Table 5.
Table 5. Ideal Input/Output Code (AD7863-10/AD7863-3)
Analog Input
+FSR/2 − 1 LSB
+FSR/2 − 2 LSBs
+FSR/2 − 3 LSBs
GND + 1 LSB
GND
GND − 1 LSB
−FSR/2 + 3 LSBs
−FSR/2 + 2 LSBs
−FSR/2 + 1 LSB
1
2
The analog input section for the AD7863-2 contains no biasing
resistors and the V
multiplexer and track-and-hold amplifier circuitry. The analog
input range is 0 V to 2.5 V into a high impedance stage with an
FSR is full-scale range = 20 V (AD7863-10) and = 5 V (AD7863-3) with V
1 LSB = FSR/16,384 = 1.22 mV (AD7863-10) and 0.3 mV (AD7863-3) with
V
REF
AGND
V
V
REF
= 2.5 V.
AX
Figure 5. AD7863-10/AD7863-3 Analog Input Structure
2kΩ
R1
1
2
REFERENCE
AX/BX
R2
R3
2.5V
pin drives the input directly to the
Digital Output Code Transition
011 . . . 110 to 011 . . . 111
011 . . . 101 to 011 . . . 110
011 . . . 100 to 011 . . . 101
000 . . . 000 to 000 . . . 001
111 . . . 111 to 000 . . . 000
111 . . . 110 to 111 . . . 111
100 . . . 010 to 100 . . . 011
100 . . . 001 to 100 . . . 010
100 . . . 000 to 100 . . . 001
MUX
TO ADC
REFERENCE
CIRCUITRY
AD7863-10/AD7863-3
TRACK/
HOLD
TO INTERNAL
COMPARATOR
REF
= 2.5 V.
Rev. B | Page 10 of 24
input current of less than 100 nA. This input is benign, with no
dynamic charging currents. Once again, the designed code
transitions occur on successive integer LSB values. Output
coding is straight (natural) binary with 1 LSB = FS/16,384 =
2.5 V/16,384 = 0.15 mV. Table 6 shows the ideal input/output
transfer function for the AD7863-2.
Table 6. Ideal Input/Output Code (AD7863-2)
Analog Input
+FSR − 1 LSB
+FSR − 2 LSB
+FSR − 3 LSB
GND + 3 LSB
GND + 2 LSB
GND + 1 LSB
1
2
OFFSET AND FULL-SCALE ADJUSTMENT
In most digital signal processing (DSP) applications, offset and
full-scale errors have little or no effect on system performance.
Offset error can always be eliminated in the analog domain by
ac coupling. Full-scale error effect is linear and does not cause
problems as long as the input signal is within the full dynamic
range of the ADC. Invariably, some applications require that the
input signal span the full analog input dynamic range. In such
applications, offset and full-scale error have to be adjusted to zero.
Figure 6 shows a typical circuit that can be used to adjust the
offset and full-scale errors on the AD7863 (V
AD7863-10 version is shown for example purposes only).
Where adjustment is required, offset error must be adjusted
before full-scale error. This is achieved by trimming the offset
of the op amp driving the analog input of the AD7863 while the
input voltage is ½ LSB below analog ground. The trim
procedure is as follows: apply a voltage of −0.61 mV (−½ LSB)
at V
ADC output code flickers between 11 1111 1111 1111 and
00 0000 0000 0000.
FSR is full-scale range = 2.5 V for AD7863-2 with V
1 LSB = FSR/16,384 = 0.15 mV for AD7863-2 with V
1
in Figure 6 and adjust the op amp offset voltage until the
INPUT RANGE = ±10V
2
10kΩ
10kΩ
500Ω
1
R3
R1
R2
V
*ADDITIONAL PINS OMITTED FOR CLARITY.
1
Figure 6. Full-Scale Adjust Circuit
10kΩ
R5
Digital Output Code Transition
111 . . . 110 to 111 . . . 111
111 . . . 101 to 111 . . . 110
111 . . . 100 to 111 . . . 101
000 . . . 010 to 000 . . . 011
000 . . . 001 to 000 . . . 010
000 . . . 000 to 000 . . . 001
10kΩ
R4
V
AGND
AD7863*
REF
A1
REF
= 2.5 V.
= 2.5 V.
A1
on the