AD807A-155BRZ Analog Devices Inc, AD807A-155BRZ Datasheet
AD807A-155BRZ
Specifications of AD807A-155BRZ
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AD807A-155BRZ Summary of contents
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PRODUCT DESCRIPTION The AD807 provides the receiver functions of data quantization, signal level detect, clock recovery and data retiming for 155 Mbps NRZ data. The device, together with a PIN diode/preamplifier combination, can be used for a highly integrated, ...
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AD807–SPECIFICATIONS Parameter QUANTIZER–DC CHARACTERISTICS Input Voltage Range Input Sensitivity, V SENSE Input Overdrive Input Offset Voltage Input Current Input RMS Noise Input Peak-to-Peak Noise QUANTIZER–AC CHARACTERISTICS Upper –3 dB Bandwidth Input Resistance Input Capacitance Pulsewidth Distortion LEVEL DETECT ...
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... Temperature Range AD807A-155BR – +85 C AD807A-155BRRL7 – +85 C AD807A-155BRRL – +85 C CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD807 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges ...
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AD807 DEFINITION OF TERMS Maximum, Minimum and Typical Specifications Specifications for every parameter are derived from statistical analyses of data taken on multiple devices from multiple wafer lots. Typical specifications are the mean of the distribution of the data for ...
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Bandwidth This describes the frequency at which the AD807 attenuates sinusoidal input jitter by 3 dB. Peaking This describes the maximum jitter gain of the AD807 in dB. Damping Factor, Damping factor, describes the compensation of the second order PLL. ...
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AD807 –Typical Performance Characteristics 200.0E+3 180.0E+3 160.0E+3 140.0E+3 120.0E+3 100.0E+3 80.0E+3 60.0E+3 40.0E+3 20.0E+3 0.0E+0 0.0 5.0 10.0 15.0 20.0 SIGNAL DETECT LEVEL – mV 35.0E– THRESH 30.0E–3 25.0E–3 20.0E–3 15.0E–3 10.0E– 49.9k THRESH 5.0E–3 ...
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TEST CONDITIONS WORST-CASE: – 1.4 1.5 1.6 1.7 1.8 1.9 RMS JITTER – Degrees 1E+3 100E+0 10E+0 AD807 1E+0 SONET MASK 100E–3 10E+0 100E+0 1E+3 10E+3 FREQUENCY – Hz 3.0 PSR ...
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AD807 THRESHOLD AD807 PIN COMPARATOR STAGES AND CLOCK RECOVERY NIN PLL ITHR POSITIVE LEVEL- PEAK DETECTOR NEGATIVE LEVEL- PEAK DETECTOR Phase-Locked Loop The phase-locked loop recovers clock and retimes data from NRZ data. The architecture uses a frequency detector to ...
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C1 0 100 100 R9 J1 154 C3 0 100 DATAOUTN R6 100 DATAOUTP 100 CLKOUTN R8 100 CLKOUTP C6 0 100 ...
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AD807 C1 0 100 100 J1 C2 0.1 F DATAOUTN DATAOUTP C3 0 0.1 F CLKOUTN CLKOUTP 100 100 C2 0.1 F NOTES: 1. ALL CAPACITORS ARE ...
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C1 0 100 100 R9 154 C2 0 100 J1 R6 100 100 C7 0 100 0.1 ...
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AD807 USING THE AD807 Ground Planes Use of one ground plane for connections to both analog and digital grounds is recommended. Power Supply Connections Use capacitor between V and ground is recom- CC mended. Care should ...