AD8227BRMZ-RL Analog Devices Inc, AD8227BRMZ-RL Datasheet - Page 19

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AD8227BRMZ-RL

Manufacturer Part Number
AD8227BRMZ-RL
Description
LowCostWideInputRangeInAmp G-5
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD8227BRMZ-RL

Amplifier Type
Instrumentation
Number Of Circuits
1
Output Type
Rail-to-Rail
Slew Rate
0.8 V/µs
-3db Bandwidth
250kHz
Current - Input Bias
20nA
Voltage - Input Offset
100µV
Current - Supply
350µA
Current - Output / Channel
13mA
Voltage - Supply, Single/dual (±)
2.2 V ~ 36 V, ±1.5 V ~ 18 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
8-MSOP, Micro8™, 8-uMAX, 8-uSOP,
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Gain Bandwidth Product
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
THEORY OF OPERATION
ARCHITECTURE
The AD8227 is based on the classic three op amp topology. This
topology has two stages: a preamplifier to provide differential
amplification followed by a difference amplifier that removes
the common-mode voltage and provides additional amplifica-
tion. Figure 58 shows a simplified schematic of the AD8227.
The first stage works as follows. To maintain a constant voltage
across the bias resistor, R
constant diode drop above the positive input voltage. Similarly,
Amplifier A2 keeps Node 4 at a constant diode drop above the
negative input voltage. Therefore, a replica of the differential
input voltage is placed across the gain setting resistor, R
current that flows across this resistance must also flow through
the R1 and R2 resistors, creating a gained differential signal
between the A2 and A1 outputs. Note that, in addition to a
gained differential signal, the original common-mode signal,
shifted a diode drop up, is also still present.
The second stage is a difference amplifier, composed of
Amplifier A3 and the R3 through R6 resistors. This stage
removes the common-mode signal from the amplified
differential signal and gains it by 5.
The transfer function of the AD8227 is
where:
V
G
OUT
=
5 +
= G × (V
+IN
80
R
G
IN+
OVERVOLTAGE
PROTECTION
ESD AND
− V
B
IN−
, Amplifier A1 must keep Node 3 at a
) + V
REF
Q1
NODE 3
R
B
8kΩ
R1
A1
NODE 1
+V
–V
S
S
GAIN STAGE
R
G
Figure 58. Simplified Schematic
G
. The
V
BIAS
Rev. 0 | Page 19 of 24
+V
–V
S
S
–V
A2
S
NODE 2
R2
8kΩ
NODE 4
Q2
GAIN SELECTION
Placing a resistor across the R
AD8227. The gain can be calculated by referring to Table 7 or
by using the following gain equation:
Table 7. Gains Achieved Using Common Resistor Values
Standard Table Value of R
No resistor
100 kΩ
49.9 kΩ
26.7 kΩ
20 kΩ
16 kΩ
10 kΩ
5.36 kΩ
2 kΩ
1.78 kΩ
1 kΩ
845 Ω
412 Ω
162 Ω
80.6 Ω
The AD8227 defaults to G = 5 when no gain resistor is used.
The tolerance and gain drift of the R
to the specifications of the AD8227 to determine the total gain
accuracy of the system. When the gain resistor is not used, gain
error and gain drift are minimal.
R
B
R
G
OVERVOLTAGE
PROTECTION
=
ESD AND
80
G
5
10kΩ
10kΩ
–IN
R4
R5
G
G
AMPLIFIER STAGE
50kΩ
terminals sets the gain of the
R6
DIFFERENCE
50kΩ
A3
R3
+V
–V
G
Calculated Gain
5
5.8
6.6
8
9
10
13
19.9
45
49.9
85
99.7
199
499
998
S
resistor should be added
S
+V
–V
S
S
V
REF
OUT
AD8227

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