AD9262BCPZRL7-10 Analog Devices Inc, AD9262BCPZRL7-10 Datasheet
AD9262BCPZRL7-10
Specifications of AD9262BCPZRL7-10
Related parts for AD9262BCPZRL7-10
AD9262BCPZRL7-10 Summary of contents
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FEATURES SNR (85 dBFS MHz input SFDR: −87 dBc to 10 MHz input Noise figure Input impedance: 1 kΩ Power: 600 mW 1.8 V analog supply operation 1 3.3 V output supply ...
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AD9262 TABLE OF CONTENTS Features .............................................................................................. 1 Applications ....................................................................................... 1 General Description ......................................................................... 1 Functional Block Diagram .............................................................. 1 Product Highlights ........................................................................... 1 Revision History ............................................................................... 2 Specifications ..................................................................................... 3 DC Specifications ......................................................................... 3 AC Specifications .......................................................................... 4 Digital Decimation ...
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SPECIFICATIONS DC SPECIFICATIONS All power supplies set to 1.8 V, 640 MHz sample rate, 0.5 V internal reference, PLL disabled, 40 MSPS output data rate, AIN unless otherwise noted. Table 1. Parameter Temp RESOLUTION Full ANALOG INPUT BANDWIDTH ACCURACY No ...
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AD9262 AC SPECIFICATIONS All power supplies set to 1.8 V, 640 MHz sample rate, 0.5 V internal reference, PLL disabled, 40 MSPS output data rate, AIN = −2.0 dBFS, unless otherwise noted. Table 2. 1 Parameter SIGNAL-TO-NOISE RATIO (SNR) 2 ...
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DIGITAL DECIMATION FILTERING CHARACTERISTICS All power supplies set to 1.8 V, 640 MHz sample rate, 0.5 V internal reference, PLL disabled, 40 MSPS output data rate, AIN = −2.0 dBFS, unless otherwise noted. Table 3. AD9262BCPZ 1 Parameter Min Typ ...
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AD9262 DIGITAL SPECIFICATIONS All power supplies set to 1.8 V, 640 MHz sample rate, 0.5 V internal reference, PLL disabled, 40 MSPS output data rate, AIN = −2.0 dBFS, unless otherwise noted. Table 4. 1 Parameter DIFFERENTIAL CLOCK INPUTS (CLK+, ...
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SWITCHING SPECIFICATIONS All power supplies set to 1.8 V, 640 MHz sample rate, 0.5 V internal reference, PLL disabled, 40 MSPS output data rate, AIN = −2.0 dBFS unless otherwise noted. Table 5. 1 Parameter CLOCK INPUT (USING CLOCK MULTIPLIER) ...
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AD9262 ABSOLUTE MAXIMUM RATINGS Table 6. Parameter Electrical AVDD to AGND DVDD to DGND DRVDD to DGND AGND to DGND AVDD to DRVDD CVDD to CGND CGND to DGND D0A to D15A to DGND D0B to D15B to DGND DCO ...
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PIN CONFIGURATION AND FUNCTION DESCRIPTIONS NOTES 1. THE EXPOSED PAD MUST BE SOLDERED TO THE GROUND PLANE FOR THE LFCSP PACKAGE. SOLDERING THE EXPOSED PADDLE TO THE PCB INCREASES THE RELIABILITY OF THE SOLDER JOINTS, MAXIMIZING THE THERMAL CAPACITY OF ...
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AD9262 TYPICAL PERFORMANCE CHARACTERISTICS All power supplies set to 1.8 V, 640 MHz sample rate p-p differential input, 0.5 V internal reference, PLL disabled, AIN = −2.0 dBFS 25°C, output data rate 40 MSPS, unless otherwise ...
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AD9262BCPZ-5 0 –20 –40 –60 –80 –100 –120 –140 –160 FREQUENCY (MHz) Figure 10. AD9262BCPZ-5 Single-Tone FFT with f 0 BANDWIDTH: 5MHz DATA RATE: 40MSPS –20 f SNR: 85.7dB SFDR: 87.4dBc –40 –60 ...
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AD9262 AD9262BCPZ-10 0 BANDWIDTH: 10MHz DATA RATE: 40MSPS –20 f SNR: 82.8dB SFDR: 87.7dBc –40 –60 –80 –100 –120 –140 –160 FREQUENCY (MHz) Figure 16. AD9262BCPZ-10 Single-Tone FFT with f 0 BANDWIDTH: 10MHz ...
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SFDR (dBFS) 100 80 SNR (dBFS) 60 SFDR (dBc –100 –90 –80 –70 –60 –50 –40 INPUT AMPLITUDE (dBFS) Figure 22. AD9262BCPZ-10 Single-Tone SNR/SFDR vs. Input Amplitude with f = 2.4 MHz IN 0 –20 –40 ...
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AD9262 83 2.4MHz 82.5 IN 82.0 f 81.5 = 8.4MHz IN 81.0 80.5 80.0 79.5 79.0 78.5 78.0 1.0 4.5 6.0 7.5 8.5 10.0 4.0 5.0 7.0 8.0 9.0 10.5 PLL DIVIDE RATIO Figure 28. AD9262BCPZ-10 Single-Tone SNR ...
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EQUIVALENT CIRCUITS 500Ω 2V p-p DIFFERENTIAL 1.8V CM 500Ω Figure 30. Equivalent Analog Input Circuit CVDD CLK+ 10kΩ 10kΩ 90kΩ 30kΩ CVDD Figure 31. Equivalent Clock Input Circuit DRVDD 1kΩ SDIO Figure 32. Equivalent SDIO Input Circuit 1kΩ SCLK 30kΩ ...
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AD9262 THEORY OF OPERATION The AD9262 uses a continuous time Σ-Δ modulator to convert the analog input to a digital word. The digital word is processed by the decimation filter and rate-adjusted by the sample rate converter (see Figure 37). ...
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Input Common Mode The analog inputs of the AD9262 are not internally dc biased. In ac-coupled applications, the user must provide this bias externally. Setting the device such that V = AVDD is recommended for CM optimum performance. The analog ...
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AD9262 External Reference Operation If an external reference is desired, the internal reference can be disabled by setting Serial Register 0x18[6] high. Figure 49 shows an application using the ADR130B as a stable external reference. 0.5V ADR130B AVDD 0.1µF 10µF ...
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Internal PLL Clock Distribution The alternative clocking option available on the AD9262 is to apply a low frequency reference clock and use the on-chip clock multip- lier to generate the high frequency f MOD architecture is shown in Figure 53. ...
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AD9262 Table 11. Common Modulator Clock Multiplication Factors CLK± 0x0A[5:0] f VCO (MHz) (PLLMULT) (MHz) 30.72 42 1290.24 39.3216 32 1258.29 52.00 25 1300.00 61.44 21 1290.24 76.80 17 1305.60 78.00 17 1326.00 78.6432 16 1258.29 89.60 15 1344.00 92.16 ...
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DIGITAL ENGINE Bandwidth Selection The digital engine (see Figure 54) selects the decimation signal bandwidth by cascading third-order sinc (sinc filters. For a 10 MHz signal band, no filters are cascaded; for a 5 MHz signal band, a single filter ...
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AD9262 Sample Rate Converter The sample rate converter (SRC) allows the flexibility of a user-defined output sample rate, enabling a more efficient and direct interface to the digital receiver blocks. The sample rate converter performs an interpolation and resampling procedure ...
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Cascaded Filter Responses The cascaded filter responses for the three signal bandwidth settings are for a 160 MSPS output data rate, as shown in Figure 55, Figure 56, and Figure 57. 0 0.08 –20 0.04 –40 0 –60 –0.04 –80 ...
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AD9262 110 OUTPUT DATA RATE (MSPS) Figure 58. DC Correction Low Frequency Notch Filter 3 dB Bandwidth vs. Output Data Rate In applications where constant tracking of the dc ...
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Table 20 shows the corresponding threshold level in dBFS vs. register setting. If the input signal crosses this level, the ORx pin is set. In the case where 0x111[5:0] is set to all 0s, the threshold level is set to ...
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AD9262 SERIAL PORT INTERFACE (SPI) The AD9262 serial port interface (SPI) allows the user to configure the converter for specific functions or operations through a structured register space provided inside the ADC. This provides the user added flexibility and customization ...
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HARDWARE INTERFACE The pins described in Table 22 comprise the physical interface between the programming device of the user and the serial port of the AD9262. The SCLK and CSB pins function as inputs when using the SPI interface. The ...
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AD9262 APPLICATIONS INFORMATION FILTERING REQUIREMENT The need for antialias protection often requires one or two octaves for a transition band, which reduces the usable band- width of a Nyquist converter to between 25% and 50% of the available bandwidth. A ...
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Table 24. Chebyshev II Filter Components Parameter Value Unit Manufacturer Murata GRM188 series, 0603 L1 180 nH Coil Craft 0603 LS 390 pF Murata GRM188 series, 0603 C3 150 pF Murata GRM188 series, 0603 In ...
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AD9262 MEMORY MAP Table 25. Memory Map Register Name Address Bit 7 SPI Port Config 0x00 0 Chip ID 0x01 Chip Grade 0x02 Channel Index 0x05 Power Modes 0x08 PLLENABLE 0x09 PLL 0x0A PLLLOCKED Analog Input 0x0F Output Modes 0x14 ...
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Register Address Bit(s) Output Modes 0x14 [1:0] Output Adjust 0x15 [3:2] [1:0] Output Clock 0x16 7 Reference 0x18 6 Output Data 0x101 6 [5:0] Overrange 0x111 7 6 [5:0] QEC1 0x112 ...
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AD9262 OUTLINE DIMENSIONS PIN 1 INDICATOR 12° MAX 1.00 0.85 0.80 SEATING PLANE ORDERING GUIDE Model 1 Temperature Range AD9262BCPZ-10 −40°C to +85°C AD9262BCPZ-5 −40°C to +85°C AD9262BCPZ −40°C to +85°C AD9262EBZ AD9262-5EBZ AD9262-10EBZ RoHS Compliant Part. ...