AD9380KSTZ-100 Analog Devices Inc, AD9380KSTZ-100 Datasheet - Page 11

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AD9380KSTZ-100

Manufacturer Part Number
AD9380KSTZ-100
Description
IC,TV/VIDEO CIRCUIT,Video Interface Circuit,CMOS,QFP,100PIN,PLASTIC
Manufacturer
Analog Devices Inc
Datasheet

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Mnemonic
POWER SUPPLY
1
The supplies should be sequenced such that V
V
V
PV
DV
GND
DD
D
DD
(3.3 V)
DD
(1.8 V to 3.3 V)
(1.8 V)
(1.8 V)
1
Description
Analog Power Supply.
These pins supply power to the ADCs and terminators. They should be as quiet and filtered as possible.
Digital Output Power Supply.
A large number of output pins (up to 27) switching at high speed (up to 150 MHz) generates many power supply
transients (noise). These supply pins are identified separately from the V
the sensitive analog circuitry can be minimized. If the AD9380 is interfacing with lower voltage logic, V
connected to a lower supply voltage (as low as 1.8 V) for compatibility.
Clock Generator Power Supply.
The most sensitive portion of the AD9380 is the clock generation circuitry. These pins provide power to the clock
PLL and help the user design for optimal performance. The designer should provide quiet, noise-free power to
these pins.
Digital Input Power Supply.
This supplies power to the digital logic.
Ground.
The ground return for all circuitry on chip. It is recommended that the AD9380 be assembled on a single solid
ground plane, with careful attention to ground current paths.
D
and V
DD
are never less than 300 mV below DV
Rev. 0 | Page 11 of 60
DD
. At no time should DV
D
pins, so output noise transferred into
DD
be more than 300 mV greater than V
AD9380
DD
may be
D
or V
DD
.

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