AD9520-0/PCBZ Analog Devices Inc, AD9520-0/PCBZ Datasheet - Page 25

• Manufacturer Part Number: AD9520-0/PCBZ
• Description: 12/24 Channel Clock Gen 2,0GH
• Manufacturer: Analog Devices Inc

Specifications of AD9520-0/PCBZ

• Design Resources: Synchronizing Multiple AD9910 1 GSPS Direct Digital Synthesizers (CN0121) Phase Coherent FSK Modulator (CN0186)
• Main Purpose: Timing, Clock Generator
• Utilized Ic / Part: AD9520-0
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Secondary Attributes: -
• Embedded: -
• Primary Attributes: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Figure 32. Phase Noise (Absolute) Clock Cleanup; Internal VCO @ 2.799 GHz;
2.703 GHz; PFD = 15.36 MHz; LBW = 63 kHz; LVPECL Output = 122.88 MHz
Figure 31. Phase Noise (Absolute) Clock Generation; Internal VCO @
–100
–110
–120
–130
–140
–150
–160
–100
–110
–120
–130
–140
–150
–160
–100
–110
–120
–130
–140
–150
–160
–80
–90
PFD = 120 kHz; LBW = 2.1 kHz; LVPECL Output = 155.52 MHz
Figure 30. Additive (Residual) Phase Noise, CLK-to-CMOS @
10
1k
1k
100
INTEGRATED RMS JITTER (12kHz TO 20MHz): 652fs
10k
10k
1k
250 MHz, Divide-by-4
FREQUENCY (Hz)
FREQUENCY (Hz)
FREQUENCY (Hz)
100k
100k
10k
100k
1M
1M
1M
10M
10M
10M
100M
100M
100M
Rev. 0 | Page 25 of 84
@ 245.76 MHz; PFD = 15.36 MHz; LBW = 250 Hz; LVPECL Output = 245.76 MHz
Figure 34. PLL Loop Filter Used for Clock Generation Plot (see Figure 31)
Figure 35. PLL Loop Filter Used for Clock Cleanup Plot (see Figure 32)
Figure 33. Phase Noise (Absolute), External VCXO (Toyocom TCO-2112)
–120
–130
–140
–150
–160
1k
CP
CP
10k
CAPACITOR
CAPACITOR
C2
62pF
C2
1.5nF
FOR LDO
FOR LDO
BYPASS
BYPASS
100k
FREQUENCY (Hz)
R1
820Ω
R1
2.1kΩ
C1
240nF
C1
4.7µF
390Ω
3kΩ
R2
R2
C12
220nF
C12
220nF
1M
C3
33pF
C3
2.2nF
LF
BYPASS
LF
BYPASS
10M
AD9520-0
100M