AD9640-105EBZ Analog Devices Inc, AD9640-105EBZ Datasheet - Page 39
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AD9640-105EBZ
Manufacturer Part Number
AD9640-105EBZ
Description
14Bit 105Msps Dual 1.8V PB Free ADC
Manufacturer
Analog Devices Inc
Datasheet
1.AD9640ABCPZ-80.pdf
(52 pages)
Specifications of AD9640-105EBZ
Design Resources
Interfacing ADL5534 to AD9640 High Speed ADC (CN0049)
Number Of Adc's
2
Number Of Bits
14
Sampling Rate (per Second)
105M
Data Interface
Serial
Inputs Per Adc
1 Differential
Input Range
2 Vpp
Power (typ) @ Conditions
730mW @ 105MSPS
Voltage Supply Source
Analog and Digital
Operating Temperature
-40°C ~ 85°C
Utilized Ic / Part
AD9640
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AD9640-150EBZ - BOARD EVALUATION AD9640 150MSPS
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
CHANNEL/CHIP SYNCHRONIZATION
The AD9640 has a SYNC input that allows the user flexible
synchronization options for synchronizing the internal blocks.
The clock divider sync feature is useful to guarantee synchronized
sample clocks across multiple ADCs. The signal monitor block
can also be synchronized using the SYNC input allowing properties
of the input signal to be measured during a specific time period.
The input clock divider can be enabled to synchronize on a single
occurrence of the sync signal or on every occurrence. The signal
monitor block is synchronized on every SYNC input signal.
Rev. B | Page 39 of 52
The SYNC input is internally synchronized to the sample clock;
however, to ensure there is no timing uncertainty between multiple
parts, the SYNC input signal should be externally synchronized to
the input clock signal, meeting the setup and hold times shown
in Table 8. The SYNC input should be driven using a single-
ended CMOS-type signal.
AD9640