AD9640-150EBZ Analog Devices Inc, AD9640-150EBZ Datasheet - Page 18
![14Bit 150MspsDual 1.8V PB Free ADC](/photos/9/11/91139/ad9640-150ebz_sml.jpg)
AD9640-150EBZ
Manufacturer Part Number
AD9640-150EBZ
Description
14Bit 150MspsDual 1.8V PB Free ADC
Manufacturer
Analog Devices Inc
Datasheet
1.AD9640ABCPZ-80.pdf
(52 pages)
Specifications of AD9640-150EBZ
Design Resources
Interfacing ADL5534 to AD9640 High Speed ADC (CN0049)
Number Of Adc's
2
Number Of Bits
14
Sampling Rate (per Second)
150M
Data Interface
Serial
Inputs Per Adc
1 Differential
Input Range
2 Vpp
Power (typ) @ Conditions
1W @ 150MSPS
Voltage Supply Source
Analog and Digital
Operating Temperature
-40°C ~ 85°C
Utilized Ic / Part
AD9640
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
AD9640
Pin No.
Digital Inputs
Digital Outputs
63
62
3
2
5
4
7
6
9
8
13
12
15
14
17
16
19
18
23
22
26
25
28
27
30
29
32
31
11
10
SPI Control
48
47
51
Signal Monitor Ports
33
35
34
52
Mnemonic
SYNC
D0+ (LSB)
D0− (LSB)
D1+
D1−
D2+
D2−
D3+
D3−
D4+
D4−
D5+
D5−
D6+
D6−
D7+
D7−
D8+
D8−
D9+
D9−
D10+
D10−
D11+
D11−
D12+
D12−
D13+ (MSB)
D13− (MSB)
DCO+
DCO−
SCLK/DFS
SDIO/DCS
CSB
SMI SDO/OEB
SMI SDFS
SMI SCLK/PDWN
Type
Input
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Input
Input/Output
Input
Input/Output
Output
Input/Output
Function
Digital Synchronization Pin. Slave mode only.
Channel A/Channel B LVDS Output Data 0—True.
Channel A/Channel B LVDS Output Data 0—Complement.
Channel A/Channel B LVDS Output Data 1—True.
Channel A/Channel B LVDS Output Data 1—Complement.
Channel A/Channel B LVDS Output Data 2—True.
Channel A/Channel B LVDS Output Data 2—Complement.
Channel A/Channel B LVDS Output Data 3—True.
Channel A/Channel B LVDS Output Data 3—Complement.
Channel A/Channel B LVDS Output Data 4—True.
Channel A/Channel B LVDS Output Data 4—Complement.
Channel A/Channel B LVDS Output Data 5—True.
Channel A/Channel B LVDS Output Data 5—Complement.
Channel A/Channel B LVDS Output Data 6 —True.
Channel A/Channel B LVDS Output Data 6—Complement.
Channel A/Channel B LVDS Output Data 7—True.
Channel A/Channel B LVDS Output Data 7—Complement.
Channel A/Channel B LVDS Output Data 8—True.
Channel A/Channel B LVDS Output Data 8—Complement.
Channel A/Channel B LVDS Output Data 9—True.
Channel A/Channel B LVDS Output Data 9—Complement.
Channel A/Channel B LVDS Output Data 10—True.
Channel A/Channel B LVDS Output Data 10—Complement.
Channel A/Channel B LVDS Output Data 11—True.
Channel A/Channel B LVDS Output Data 11—Complement.
Channel A/Channel B LVDS Output Data 12—True.
Channel A/Channel B LVDS Output Data 12—Complement.
Channel A/Channel B LVDS Output Data 13—True.
Channel A/Channel B LVDS Output Data 13—Complement.
Channel A/Channel B LVDS Data Clock Output—True.
Channel A/Channel B LVDS Data Clock Output—Complement.
SPI Serial Clock/Data Format Select Pin in External Pin Mode.
SPI Serial Data I/O/Duty Cycle Stabilizer in External Pin Mode.
SPI Chip Select (Active Low).
Signal Monitor Serial Data Output/Output Enable Input (Active Low) in External Pin Mode.
Signal Monitor Serial Data Frame Sync.
Signal Monitor Serial Clock Output/Power-Down Input in External Pin Mode.
Rev. B | Page 18 of 52