AD9857/PCBZ Analog Devices Inc, AD9857/PCBZ Datasheet - Page 17
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AD9857/PCBZ
Manufacturer Part Number
AD9857/PCBZ
Description
Eval Bd For 14 Bit 150MHz Quad DigUpconv
Manufacturer
Analog Devices Inc
Type
Upconverterr
Datasheet
1.AD9857PCB.pdf
(40 pages)
Specifications of AD9857/PCBZ
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
AD9857
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AD9857/PCBZ
Manufacturer:
XILINX
Quantity:
501
INTERPOLATING DAC MODE
A block diagram of the AD9857 operating in the interpolating
DAC mode is shown in Figure 20. In this mode, the DDS and
modulator are both disabled and only the I data path is active.
The Q data path is disabled from the 14-bit parallel data port up
to and including the modulator.
As in the quadrature modulation mode, the PDCLK pin is an
output and functions as a clock which serves to synchronize the
input of data to the AD9857. Unlike the quadrature modulation
mode, however, the PDCLK operates at the rate of the I data
path. This is because only I data is being presented to the
parallel port as opposed to the interleaved I/Q format of the
quadrature modulation mode.
PARALLEL
DATA IN
(14-BIT)
PDCLK/
FUD
14
I
TxENABLE
CIC FILTER
INVERSE
INV
CIC
RESET
OVERFLOW
POLATOR
INTER-
FIXED
(4 )
CIC
CONTROL REGISTERS
PROGRAMMABLE
SERIAL
INTERPOLATOR
PORT
(2 - 63 )
Figure 20. Interpolating DAC Mode
CIC
POWER-
POWER-
DIGITAL
Rev. C| Page 17 of 40
DOWN
LOGIC
DOWN
TIMING AND CONTROL
PROFILE
PS1
SELECT
LOGIC
PS0
In the Interpolating DAC mode, the baseband data supplied at
the parallel port remains at baseband at the output; that is, no
modulation takes place. However, a sample rate conversion
takes place based on the programmed interpolation rate. The
interpolation hardware performs the necessary signal
processing required to eliminate the aliased images at baseband
that would otherwise result from a sample rate conversion. The
interpolating DAC function is effectively an oversampling
operation with the original input spectrum intact but sampled
at a higher rate.
INVERSE
FILTER
SINC
MULTIPLIER
(4 – 20 )
CLOCK
LOCK
PLL
14
AD9857
OUTPUT
SCALE
VALUE
8
CONTROL
CLOCK
MODE
14-BIT
INPUT
MODE
DAC
DAC_RSET
IOUT
IOUT
REFCLK
REFCLK
AD9857