ADM2914-2ARQZ-RL7 Analog Devices Inc, ADM2914-2ARQZ-RL7 Datasheet - Page 8

Quad UV/OV Monitor

ADM2914-2ARQZ-RL7

Manufacturer Part Number
ADM2914-2ARQZ-RL7
Description
Quad UV/OV Monitor
Manufacturer
Analog Devices Inc
Type
Multi-Voltage Supervisorr
Datasheet

Specifications of ADM2914-2ARQZ-RL7

Number Of Voltages Monitored
4
Output
Open Drain or Open Collector
Reset
Active Low
Reset Timeout
Adjustable/Selectable
Voltage - Threshold
Adjustable/Selectable
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
16-QSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
ADM2914
THEORY OF OPERATION
VOLTAGE SUPERVISION
The ADM2914 supervises up to four voltage rails for overvol-
tage and undervoltage conditions. Two pins, VHx and VLx, are
assigned to monitor each rail, one for overvoltage detection and
the other for undervoltage detection. Each pin is connected to
the input of an internal voltage comparator, and its voltage level
is internally compared with a 0.5 V voltage reference with
accuracy of ±1.5%.
The output of each of the internal undervoltage comparators is
tied to a common UV output pin. Likewise, the outputs of the
internal overvoltage comparators are tied to a common OV
output pin.
Table 5. Polarity Configuration
SEL Pin
Connected to V
Left Unconnected
Connected to GND
PSU
5V
3.3V
2.5V
1.8V
CC
Figure 16. Typical Applications Diagram
VH1
VL1
VH2
VL2
VH3
VL3
VH4
VL4
REF
Polarity
Positive
Positive
Negative
ADM2914
GND
V
CC
LATCH/DIS
TIMER
UV Condition
VH3 < 0.5 V
VH3 < 0.5 V
VL3 > 0.5 V
SEL
UV
OV
Input 3
SYSTEM
Rev. B | Page 8 of 16
OV Condition
VL3 > 0.5 V
VL3 > 0.5 V
VH3 < 0.5 V
POLARITY CONFIGURATION
The ADM2914 is capable of monitoring supply voltages of both
positive and negative polarities. The SEL pin is a three-state pin
that determines the polarity of Input 3 and Input 4. As summa-
rized in Table 5, the SEL pin is either connected to GND, V
or left unconnected.
When an input is configured to monitor a positive voltage, using
the three-resistor scheme shown in Figure 17, VHx is connected
to the high-side tap of the resistor divider and VLx is connected
to the low-side tap of the resistor divider.
Conversely, when an input is configured to monitor a negative
voltage, UVx and OVx are swapped internally. The negative
voltage for monitoring is then connected as shown in Figure 18.
VHx is still connected to the high-side tap and VLx is still
connected to the low-side tap. Within this configuration, an
undervoltage condition occurs when the monitored voltage is less
negative than the programmed threshold, and an overvoltage
condition occurs when the monitored voltage is more negative
than the configured threshold.
Polarity
Positive
Negative
Negative
UV Condition
VH4 < 0.5 V
VL4 > 0.5 V
VL4 > 0.5 V
Input 4
OV Condition
VL4 > 0.5 V
VH4 < 0.5 V
VH4 < 0.5 V
CC
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