ADN4600ACPZ Analog Devices Inc, ADN4600ACPZ Datasheet
ADN4600ACPZ
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ADN4600ACPZ Summary of contents
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FEATURES Full 8 × 8 crossbar connectivity Fully buffered signal path supports multicast and broadcast operation Optimized for dc to 4.25 Gbps data Programmable receive equalization Compensates for in. of FR4 @ 4.25 Gbps Programmable transmit pre-emphasis/de-emphasis ...
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ADN4600 TABLE OF CONTENTS Features .............................................................................................. 1 Applications ....................................................................................... 1 Functional Block Diagram .............................................................. 1 General Description ......................................................................... 1 Revision History ............................................................................... 2 Specifications ..................................................................................... 3 Electrical Specifications ............................................................... 3 Timing Specifications .................................................................. 5 Absolute Maximum Ratings ............................................................ 6 ESD ...
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SPECIFICATIONS ELECTRICAL SPECIFICATIONS TTI TTO 25°C, unless otherwise noted. A Table 1. Parameter DYNAMIC PERFORMANCE Maximum Data Rate per Channel Deterministic Jitter ...
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ADN4600 Parameter POWER SUPPLY Operating Range TTI V TTO 3 Supply Current I TTO TTO LOGIC CHARACTERISTICS Input High ( Input Low (V ) ...
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TIMING SPECIFICATIONS 2 Table Timing Parameters Parameter Min Max f 0 400 SCL t 0.6 N/A HD;STA t 0.6 N/A SU;STA t 1.3 N/A LOW t 0.6 N/A HIGH t 0 N/A HD;DAT t 10 N/A SU;DAT ...
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ADN4600 ABSOLUTE MAXIMUM RATINGS Table 3. Parameter Rating 3 0.6 V TTI 0.6 V TTO CC Internal Power Dissipation 4.26 W Differential Input Voltage 2.0 V Logic ...
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PIN CONFIGURATION AND FUNCTION DESCRIPTIONS Table 4. Pin Function Descriptions Pin No. Mnemonic 1 RESETB 2, 11, 16, 17, 27, VEE 30, 32, 33, 37, 46, 53, 62 12, 35, IN0 to IN7 38, 41, 44 ...
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ADN4600 TYPICAL PERFORMANCE CHARACTERISTICS Figure 5 to Figure 8 were obtained using the standard test circuit shown in Figure 4. DATA OUT PATTERN GENERATOR 50ps/DIV Figure 5. 3.25 Gbps Input Eye (TP1 from Figure 4) 50ps/DIV Figure 6. 4.25 Gbps ...
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Figure 10 to Figure 13 were obtained using the standard test circuit shown in Figure 9. 50Ω CABLES 2 DATA OUT PATTERN GENERATOR Figure 9. Input Equalization Test Circuit, FR4 (See Figure 5 and Figure 6 for the Reference Eye ...
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ADN4600 Figure 15 to Figure 18 were obtained using the standard test circuit shown in Figure 14. 50Ω CABLES 2 DATA OUT PATTERN GENERATOR 50ps/DIV Figure 15. 3.25 Gbps Output Eye, 30 Inch FR4 Output Channel (TP3 ...
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Test conditions 1 unless otherwise noted DATA RATE (Hz) Figure 19. Deterministic Jitter vs. Data Rate 100 90 80 ...
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ADN4600 450000 400000 350000 300000 250000 200000 150000 100000 50000 0 –8 –6 –4 – JITTER (ps) Figure 25. Random Jitter Histogram 100 Rev Page 12 of ...
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THEORY OF OPERATION INTRODUCTION The ADN4600 × 8, buffered, asynchronous, 8-channel crosspoint switch that allows fully nonblocking connectivity between its transmitters and receivers. The switch supports multicast and broadcast operation, allowing the ADN4600 to work in redundancy ...
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ADN4600 Table 5. Common Input Voltage Levels Configuration Low V , AC-Coupled Input TTI Single 1.8 V Supply 3.3 V Core Single 3.3 V Supply Table 6. Receive Equalizer Boost vs. Setting RX EQ Bit Settings Boost (dB) 0 3.5 ...
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SWITCH CORE The ADN4600 switch core is a fully nonblocking 8 × 8 array that allows multicast and broadcast configurations. The configuration of the switch core is controlled through the I control interface. The control interface receives and stores the ...
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ADN4600 TRANSMITTERS Output Structure and Output Levels The ADN4600 transmitter outputs incorporate 50 Ω termination resistors, ESD protection, and output current switch. Each channel provides independent control of both the absolute output level and the pre-emphasis output level. It should ...
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Table 12. Output Level Programming V (mV) V Peak (mV) PE (dB 0.00 50 150 9.54 50 250 13.98 50 350 16.90 50 450 19.08 50 550 20.83 50 650 22.28 100 100 0.00 100 200 ...
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ADN4600 V (mV) V Peak (mV) PE (dB 400 700 4.86 400 800 6.02 400 900 7.04 400 1000 7.96 450 450 0.00 450 550 1.74 450 650 3.19 450 750 4.44 450 850 5.52 450 950 6.49 ...
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High Current Setting and Output Level Shift In low voltage applications, users must pay careful attention to both the differential and common-mode signal levels (see Figure 30 and Table 13). Failure to understand the implications of signal level and choice ...
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ADN4600 Output Levels and Output Compliance Peak TOT OCM (mV) (mA) (mV) Boost (dB) (mV) ( and V = 1.8 V TTO CC 200 8 200 1.00 0.00 200 ...
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Selective Squelch and Disable Each transmitter is equipped with disable and squelch controls. Disable is a full power-down state: all transmitter current, including output current, is reduced and the output pins are pulled up to VTTO, but ...
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ADN4600 CONTROL INTERFACE Serial Interface General Functionality The ADN4600 register set is controlled through a 2-wire I 2 interface. The ADN4600 acts only the I C bus in the system needs to include ...
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I C Interface Data Transfers: Data Read To read data from the ADN4600 register set, a microcontroller 2 (or any other I C master) needs to send the appropriate control signals to the ADN4600 slave device. Use the following ...
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ADN4600 PCB DESIGN GUIDELINES Proper RF PCB design techniques must be used for optimal performance. Power Supply Connections and Ground Planes Use of one low impedance ground plane is recommended. The VEE pins should be soldered directly to the ground ...
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CONTROL REGISTER MAP 2 Table 16. Basic Mode I C Register Definitions Addr (Hex) Name Bit 7 Bit 6 0x00 Reset 0x40 XPT IN PORT[2] Configuration 0x41 XPT Update 0x50 XPT Status 0 0x51 XPT Status 1 0x52 XPT Status ...
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ADN4600 2 Table 17. Advanced Mode I C Register Definitions Addr (Hex) Name Bit 7 Bit 6 0x23 TxHeadroom TxH_B3 TxH_B2 0x83 RX0 EQ1 EQ CTL SRC Control 0x84 RX0 EQ3 Control 0x85 RX0 FR4 Control 0x8B RX1 EQ1 EQ ...
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Addr (Hex) Name Bit 7 Bit 6 0xD1 TX2 Output TX2 CTL Level Control 1 SRC 0xD2 TX2 Output Level Control 0 0xD3 TX2 Squelch Control 0xD9 TX3 Output TX3 CTL Level Control 1 SRC 0xDA TX3 Output Level Control ...
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... ADN4600 PACKAGE OUTLINE DIMENSIONS PIN 1 INDICATOR 12° MAX 1.00 0.85 0.80 SEATING PLANE ORDERING GUIDE Model Temperature Range 1 ADN4600ACPZ −40°C to +85°C AD4600ACPZ-R7 1 − + ADN4600-EVALZ RoHS Compliant Part. ©2008 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. ...