ADT75BRMZ-REEL7 Analog Devices Inc, ADT75BRMZ-REEL7 Datasheet - Page 19

• Manufacturer Part Number: ADT75BRMZ-REEL7
• Description: IC,TEMPERATURE SENSOR,TSSOP,8PIN,PLASTIC
• Manufacturer: Analog Devices Inc

Specifications of ADT75BRMZ-REEL7

• Function: Temp Monitoring System (Sensor)
• Topology: ADC (Sigma Delta), Comparator, Register Bank
• Sensor Type: Internal
• Sensing Temperature: -55°C ~ 125°C
• Output Type: I²C™/SMBus™
• Output Alarm: No
• Output Fan: No
• Voltage - Supply: 3 V ~ 5.5 V
• Operating Temperature: -55°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 8-TSSOP, 8-MSOP (0.118", 3.00mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

OS/ALERT OUTPUT OVERTEMPERATURE MODES
The ADT75 has two overtemperature modes, comparator mode
and interrupt mode. The OS/ALERT pin defaults on power up
as an OS pin; the comparator mode is the default power up
overtemperature mode. The OS/ALERT output pin becomes
active when the temperature measured exceeds the temperature
limit stored in the T
this event depends on the overtemperature mode selected.
Comparator Mode
In the comparator mode, the OS/ALERT pin returns to its
inactive status when the temperature measured drops below the
limit stored in the T
into shutdown mode does not reset the OS/ALERT state in
comparator mode.
OS
HYST
setpoint register. How this pin reacts after
setpoint register. Putting the ADT75
POLARITY = ACTIVE HIGH
POLARITY = ACTIVE HIGH
POLARITY = ACTIVE LOW
POLARITY = ACTIVE LOW
(COMPARATOR MODE)
(COMPARATOR MODE)
(INTERRUPT MODE)
(INTERRUPT MODE)
OS/ALERT PIN
OS/ALERT PIN
OS/ALERT PIN
OS/ALERT PIN
Figure 19. OS/ALERT Output Temperature Response Diagram
TEMPERATURE
82°C
81°C
80°C
79°C
78°C
77°C
76°C
75°C
74°C
73°C
Rev. A | Page 19 of 24
READ
Interrupt Mode
In the interrupt mode, the OS/ALERT pin goes inactive when
any ADT75 register is read. The OS/ALERT pin can only return
to active status if the temperature measured is below the limit
stored in the T
reset, it goes active again only when the temperature has gone
above the T
SMBus alert response address (ARA) when this pin has been
selected as a SMBus alert pin. More information is given in the
SMBUS Alert section.
Figure 19 illustrates the comparator and interrupt modes with
both pin polarity settings. Placing the ADT75 into shutdown
mode resets the OS/ALERT pin in the interrupt mode.
READ
OS
limit. The OS/ALERT pin can also be reset by a
HYST
READ
setpoint register. Once the OS/ALERT pin is
T
T
OS
HYST
TIME
ADT75