ADUC7033BSTZ-88-RL Analog Devices Inc, ADUC7033BSTZ-88-RL Datasheet - Page 98

• Manufacturer Part Number: ADUC7033BSTZ-88-RL
• Description: Flash 96k ARM7 Dual 16-Bit ADC LIN I.C.
• Manufacturer: Analog Devices Inc
• Type: Battery Managementr

Specifications of ADUC7033BSTZ-88-RL

• Input Type: Logic
• Output Type: Logic
• Interface: UART, SPI
• Current - Supply: 20mA
• Mounting Type: Surface Mount
• Package / Case: 48-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ADuC7033
GPIO Port1 Clear Register
Name:
Address:
Access:
Function:
Table 69. GP1CLR MMR Bit Designations
Bit
31 to 18
17
16
15 to 0
GPIO Port2 Clear Register
Name:
Address:
Access:
Function:
Table 70. GP2CLR MMR Bit Designations
Bit
31 to 23
22
21
20 to 18
17
16
15 to 0
Description
Reserved. These bits are reserved and should be written as 0 by user code.
Port1.1 Clear Bit.
Set to 1 by user code to clear the external GPIO_6 pin low.
If user software clears this bit to 0, it has no effect on the external GPIO_6 pin.
Port1.0 Clear Bit.
Set to 1 by user code to clear the external GPIO_5 pin low.
If user software clears this bit to 0, it has no effect on the external GPIO_5 pin.
Reserved. These bits are reserved and should be written as 0 by user code.
GP1CLR
0xFFFF0D38
Write only
This 32-bit MMR allows user code to individually bit-address external GPIO pins to clear them low only. User code
can accomplish this using the GP1CLR MMR without having to modify or maintain the status of any other GPIO pins
(as user code requires when using GP1DAT).
GP2CLR
0xFFFF0D48
Write only
This 32-bit MMR allows user code to individually bit-address external GPIO pins to clear them low only. User code
can accomplish this using the GP2CLR MMR without having to modify or maintain the status of any other GPIO pins
(as user code requires when using GP2DAT).
Description
Reserved. These bits are reserved and should be written as 0 by user code.
Port2.6 Clear Bit.
Set to 1 by user code to clear the external GPIO_13 pin low.
If user software clears this bit to 0, it has no effect on the external GPIO_8 pin.
Port2.5 Clear Bit.
Set to 1 by user code to clear the external GPIO_12 pin low.
If user software clears this bit to 0, it has no effect on the external GPIO_7 pin.
Reserved. These bits are reserved and should be written as 0 by user code.
Port2.1 Clear Bit.
Set to 1 by user code to clear the external GPIO_8 pin low.
If user software clears this bit to 0, it has no effect on the external GPIO_8 pin.
Port2.0 Clear Bit.
Set to 1 by user code to clear the external GPIO_7 pin low.
If user software clears this bit to 0, it has no effect on the external GPIO_7 pin.
Reserved. These bits are reserved and should be written as 0 by user code.
Rev. B | Page 98 of 140