ADV7180KCP32Z-RL Analog Devices Inc, ADV7180KCP32Z-RL Datasheet - Page 35

• Manufacturer Part Number: ADV7180KCP32Z-RL
• Description: 10-bit 4x Oversampling SDTV Decoder
• Manufacturer: Analog Devices Inc
• Type: Video Decoderr

Specifications of ADV7180KCP32Z-RL

• Design Resources: Low Cost Differential Video Receiver Using ADA4851 Amplifier and ADV7180 Video Decoder (CN0060) Low Cost Video Multiplexer for Video Switching Using ADA4853-2 Op Amp with Disable Function (CN0076)
• Applications: Digital Cameras, Mobile Phones, Portable Video
• Voltage - Supply, Analog: 1.71 V ~ 1.89 V
• Voltage - Supply, Digital: 1.65 V ~ 2 V
• Mounting Type: Surface Mount
• Package / Case: 32-LFCSP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Luma Gain
LAGC[2:0], Luma Automatic Gain Control,
Address 0x2C[6:4]
The luma automatic gain control mode bits select the operating
mode for the gain control in the luma path.
There are internal parameters (Analog Devices proprietary
algorithms) to customize the peak white gain control. Contact
local Analog Devices field applications engineers or local
Analog Devices distributor for more information.
Table 39. LAGC Function
LAGC[2:0]
000
001
010 (default)
011
100
101
110
111
LAGT[1:0], Luma Automatic Gain Timing,
Address 0x2F[7:6]
The luma automatic gain timing register allows the user to
influence the tracking speed of the luminance automatic gain
control. This register only has an effect if the LAGC[2:0] register is
set to 001, 010, 011, or 100 (automatic gain control modes).
If peak white AGC is enabled and active (see the Status 1[7:0],
Address 0x10[7:0] section), the actual gain update speed is
dictated by the peak white AGC loop and, as a result, the LAGT
settings have no effect. As soon as the part leaves peak white
AGC, LAGT becomes relevant again.
The update speed for the peak white algorithm can be
customized by the use of internal parameters. Contact Analog
Devices local field engineers for more information.
Table 40. LAGT Function
LAGT[1:0]
00
01
10
11 (default)
Manual fixed gain (use LMG[11:0])
Reserved
AGC (blank level to sync tip), peak white algorithm on
Reserved
AGC (blank level to sync tip), peak white algorithm off
Reserved
Reserved
Freeze gain
Description
Description
Slow (TC = 2 sec)
Medium (TC = 1 sec)
Fast (TC = 0.2 sec)
Adaptive
Rev. F | Page 35 of 116
LG[11:0], Luma Gain, Address 0x2F[3:0], Address
0x30[7:0]
LMG[11:0], Luma Manual Gain, Address 0x2F[3:0],
Address 0x30[7:0]
Luma gain[11:0] is a dual-function register. If all of these registers
are written to, a desired manual luma gain can be programmed.
This gain becomes active if the LAGC[2:0] mode is switched to
manual fixed gain. Equation 1 shows how to calculate a desired gain.
If read back, this register returns the current gain value.
Depending on the setting in the LAGC[2:0] bits, the value is
one of the following:
•
•
Table 41. LG/LMG Function
LG[11:0]/LMG[11:0]
LMG[11:0] = x
LG[11:0] = x
where LMG[11:0] is a decimal value between 1024 and 4095.
Calculation of the Luma Calibration Factor
1.
2.
3.
4.
This value, in decimal, is the luma calibration factor.
Luma manual gain value (LAGC[2:0] set to luma manual
gain mode)
Luma automatic gain value (LAGC[2:0] set to any of the
automatic modes)
Using a video source, set content to a grey field and apply
as a standard CVBS signal to the CVBS input of the board.
Using an oscilloscope, measure the signal at CVBS input to
ensure that its sync depth, colour burst, and luma are at the
standard levels.
Connect the output parallel pixel bus of the ADV7180 to a
backend system that has unity gain and monitor output
voltage.
Measure the luma level correctly from the black level. Turn
off the Luma AGC and manually change the value of the
luma gain control register, LMG[11:0], until the output
luma level matches the input measured in Step 2.
Luma
Gain
=
LumaCalibr
Read/Write
Write
Read
LMG
[11
ationFacto
:
0]
Description
Manual gain for luma path
Actual used gain
r
ADV7180
(1)