ADV7393BCPZ-REEL Analog Devices Inc, ADV7393BCPZ-REEL Datasheet - Page 30
![IC,TV/VIDEO CIRCUIT,Video Encoder,LLCC,40PIN,PLASTIC](/photos/6/50/65062/505-40-lfcsp_sml.jpg)
ADV7393BCPZ-REEL
Manufacturer Part Number
ADV7393BCPZ-REEL
Description
IC,TV/VIDEO CIRCUIT,Video Encoder,LLCC,40PIN,PLASTIC
Manufacturer
Analog Devices Inc
Type
Video Encoderr
Datasheet
1.ADV7393BCPZ.pdf
(108 pages)
Specifications of ADV7393BCPZ-REEL
Design Resources
Reconstruction Video Filter Using ADA4430-1 Amplifier After ADV7393 Video Encoder (CN0101)
Applications
Set-Top Boxes, Video Players, Displays
Voltage - Supply, Analog
2.6 V ~ 3.46 V
Voltage - Supply, Digital
1.71 V ~ 1.89 V
Mounting Type
Surface Mount
Package / Case
40-LFCSP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
ADV7393-DBRDZ - BOARD EVAL FOR ADV7393EVAL-ADV7393EBZ - BOARD EVAL FOR ADV7393 ENCODER
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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ADV7390/ADV7391/ADV7392/ADV7393
Table 19. Register 0x0B to Register 0x17
SR7 to
SR0
0x0B
0x0D
0x10
0x13
0x14
0x16
0x17
1
2
x = Logic 0 or Logic 1.
For correct operation, Subaddress 0x01[6:4] must equal the default value of 000.
Register
DAC 1, DAC 2,
DAC 3 output
levels
DAC power
mode
Cable detection
Pixel Port
Readback A
Pixel Port
Readback B
Control port
readback
Software reset
2
2
2
Bit Description
Positive gain to DAC output voltage
Negative gain to DAC output voltage
DAC 1 low power mode
DAC 2 low power mode
DAC 3 low power mode
SD/ED oversample rate select
Reserved
DAC 1 cable detect
Read only
DAC 2 cable detect
Read only
Reserved
Unconnected DAC autopower-down
Reserved
P[7:0] readback (ADV7390/ADV7391)
P[15:8] readback (ADV7392/ADV7393)
P[7:0] readback (ADV7392/ADV7393)
Reserved
VSYNC readback
HSYNC readback
SFL readback
Reserved
Reserved
Software reset
Reserved.
Rev. B | Page 30 of 108
7
0
0
…
0
0
1
1
…
1
0
0
x
x
x
0
0
1
6
0
0
0
…
0
1
1
1
0
…
1
0
0
x
x
x
0
5
0
0
…
1
0
0
0
…
1
0
x
x
x
0
0
0
0
Bit Number
4
0
0
0
…
1
0
0
0
0
…
1
0
0
1
x
x
x
0
3
0
0
0
…
1
0
0
0
0
…
1
0
1
0
x
x
x
0
1
2
0
0
0
…
1
0
0
0
0
…
1
0
1
0
x
x
x
0
1
0
0
1
…
1
0
0
0
1
…
1
0
1
0
1
x
x
x
0
1
0
0
1
0
…
1
0
0
1
0
…
1
0
1
0
1
x
x
x
0
Register Setting
0%.
+0.018%.
+0.036%.
…
+7.382%.
+7.5%.
−7.5%.
−7.382%.
−7.364%.
…
−0.018%.
DAC 1 low power
disabled.
DAC 1 low power enabled.
DAC 2 low power
disabled.
DAC 2 low power enabled.
DAC 3 low power
disabled.
DAC 3 low power enabled.
SD = 16×, ED = 8×.
SD = 8×, ED = 4×.
Cable detected on
DAC 1.
DAC 1 unconnected.
Cable detected on
DAC 2.
DAC 2 unconnected.
DAC autopower-down
disable.
DAC autopower-down
enable.
Read only.
Read only.
Read only.
Writing a 1 resets the
device; this is a self-
clearing bit.
Reset
Value
0x00
0x00
0xXX
0xXX
0xXX
0x00
0x00
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