CS2300P-CZZ Cirrus Logic Inc, CS2300P-CZZ Datasheet - Page 22

• Manufacturer Part Number: CS2300P-CZZ
• Description: IC General Purpose PLL LCO
• Manufacturer: Cirrus Logic Inc
• Type: Fanout Distribution, Fractional N Synthesizerr

Specifications of CS2300P-CZZ

• Pll: Yes
• Input: Clock
• Output: Clock
• Number Of Circuits: 1
• Ratio - Input:output: 1:2
• Differential - Input:output: No/No
• Frequency - Max: 75MHz
• Divider/multiplier: Yes/Yes
• Voltage - Supply: 3.1 V ~ 3.5 V
• Operating Temperature: -10°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 10-MSOP, Micro10™, 10-uMAX, 10-uSOP
• Frequency-max: 75MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1494 - BOARD EVAL GEN PURPOSE PLL
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 598-1755; CS2300P-CZZ

22
6.3.2
6.3.3
6.3.4
6.3.5
AUX PLL Lock Output Configuration (AuxLockCfg)
When the AUX_OUT pin is configured as a lock indicator (AuxOutSrc[1:0] modal parameter = ‘11’), this
global parameter configures the AUX_OUT driver to either push-pull or open drain. It also determines the
polarity of the lock signal. If AUX_OUT is configured as a clock output, the state of this parameter is dis-
regarded.
Note:
fore, the pin polarity is defined relative to the unlock condition.
Enable PLL Clock Output on Unlock (ClkOutUnl)
Defines the state of the PLL output during the PLL unlock condition.
Low-Frequency Ratio Configuration (LFRatioCfg)
Determines how to interpret the currently indexed 32-bit User Defined Ratio .
M2 Pin Configuration (M2Config[2:0])
Controls which special function is mapped to the M2 pin
AuxLockCfg
0
1
Application:
ClkOutUnl
0
1
Application:
LFRatioCfg
0
1
Application:
M2Config[2:0]
000
001
010
011
100
101
110
111
Application:
AUX_OUT is an unlock indicator, signalling an error condition when the PLL is unlocked. There-
AUX_OUT Driver Configuration
Push-Pull, Active High (output ‘high’ for unlocked condition, ‘low’ for locked condition).
Open Drain, Active Low (output ‘low’ for unlocked condition, high-Z for locked condition).
“Auxiliary Output” on page 17
Clock Output Enable Status
Clock outputs are driven ‘low’ when PLL is unlocked.
Clock outputs are always enabled (results in unpredictable output when PLL is unlocked).
“PLL Clock Output” on page 16
Ratio Bit Encoding Interpretation
20.12 - High Multiplier.
12.20 - High Accuracy.
“User Defined Ratio (RUD)” on page 13
M2 pin function
Disable CLK_OUT pin.
Disable AUX_OUT pin.
Disable CLK_OUT and AUX_OUT.
RModSel[1:0] Modal Parameter Enable.
Reserved.
AutoRMod Modal Parameter Override.
Reserved.
Force AuxOutSrc[1:0] = 10 (PLL Clock Out).
“M2 Mode Pin Functionality” on page 18
Confidential Draft
3/18/09
.
CS2300-OTP
DS844PP2