CS4272-CZZR Cirrus Logic Inc, CS4272-CZZR Datasheet - Page 26
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CS4272-CZZR
Manufacturer Part Number
CS4272-CZZR
Description
IC,Soundcard Circuits,TSSOP,28PIN,PLASTIC
Manufacturer
Cirrus Logic Inc
Datasheet
1.CS4272-CZZR.pdf
(53 pages)
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5.1.4
The CS4272 will auto-configure to output properly dithered 16-bit data when placed in Slave Mode and a 32x SCLK
to LRCK ratio is used. In this configuration, one half of a bit of dither is added to the LSB of the 16-bit word. This
applies only to the serial audio output of the ADC and will not affect DAC performance. See Figure 9.
5.1.5
The DAC output will mute following the reception of 8192 consecutive audio samples of static 0 or -1. A single sam-
ple of non-static data will release the mute. Detection and muting are done independently for each channel. The
common mode on the output will be retained and the Mute Control pin for that channel will go active during the mute
period.
5.1.6
The operational amplifiers in the input circuitry driving the CS4272 may generate a small DC offset into the ADC.
The CS4272 includes a high pass filter after the decimator to remove any DC offset which could result in recording
a DC level, possibly yielding "clicks" when switching between devices in a multichannel system.
In Stand-Alone Mode, the high pass filter continuously subtracts a measure of the DC offset from the output of the
decimation filter. This function cannot be disabled in Stand-Alone Mode.
5.1.7
In Stand-Alone Mode, the fast roll-off interpolation filter is used.
Filter specifications can be found in Section 3. Plots of the data are contained in the “Appendix” on page 47.
5.1.8
The sample rate, Fs, can be adjusted from 4 kHz to 200 kHz. In Stand-Alone Mode, the CS4272 must be set to the
proper mode via the mode pins, M1 and M0. De-emphasis, optimized for a 44.1 kHz sampling frequency, is avail-
able.
5.1.9
Either I
both the input and output format. Placing a 10 kΩ pull-up to VL on the I2S/LJ pin will select the I
placing a 10 kΩ pull-down to DGND on the I2S/LJ pin will select the left justified format.
26
Mode 1
0
0
1
1
2
S or left justified serial audio data format may be selected in Stand-Alone Mode. The selection will affect
16-Bit Auto-Dither
Auto-Mute
High Pass Filter
Mode Selection & De-Emphasis
Serial Audio Interface Format Selection
Interpolation Filter
Mode 0
1 5
0
1
0
1
1 4
1 3
Double Speed Mode
Single Speed Mode
Single Speed Mode
Quad Speed Mode
1 2
Table 5. CS4272 Stand-Alone Mode Control
Mode
1 1
Figure 9. ADC 16-Bit Auto-Dither
1 0
9
1 6 -B it W o rd
8
7
6
100 kHz - 200 kHz
Sample Rate (Fs)
50 kHz - 100 kHz
4 kHz - 50 kHz
4 kHz - 50 kHz
5
4
3
2
½ B it D ith e r
1
De-Emphasis
2
0
S format, while
44.1 kHz
CS4272
Off
Off
Off
DS593F1