CS4299-BQZR Cirrus Logic Inc, CS4299-BQZR Datasheet - Page 10

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CS4299-BQZR

Manufacturer Part Number
CS4299-BQZR
Description
IC AC97 Codec With SRC
Manufacturer
Cirrus Logic Inc
Datasheet

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CS4299-BQZR
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2. GENERAL DESCRIPTION
The CS4299-BQ is a mixed-signal serial audio Co-
dec compliant to the Intel
ification, revision 2.1 [1]. It is designed to be paired
with a digital controller, typically located on the
PCI bus or integrated within the system core logic
chip set. The controller is responsible for all com-
munications between the CS4299-BQ and the re-
mainder of the system. The CS4299-BQ contains
two distinct functional sections: digital and analog.
The digital section includes the AC-link interface,
S/PDIF interface, serial data port, Sample Rate
Converters, and power management support. The
analog section includes the analog input multiplex-
er (mux), stereo output mixer, mono output mixer,
stereo Analog-to-Digital Converters (ADCs), ste-
reo Digital-to-Analog Converters (DACs), and
their associated volume controls.
2.1
All communication with the CS4299-BQ is estab-
lished with a 5-wire digital interface to the control-
ler, as shown in Figure 7. This interface is called
the AC-link. All clocking for the serial communi-
cation is synchronous to the BIT_CLK signal.
BIT_CLK is generated by the primary audio codec
and is used to clock the controller and any second-
10
10
AC-Link
®
Audio Codec ‘97 Spec-
Digital AC'97
Controller
Figure 7. AC-link Connections
SDATA_OUT
SDATA_IN
BIT_CLK
RESET#
SYNC
ary audio codecs. Both input and output AC-link
audio frames are organized as a sequence of 256 se-
rial bits forming 13 groups referred to as ‘slots’.
During each audio frame, data is passed bi-direc-
tionally between the CS4299-BQ and the control-
ler. The input frame is driven from the CS4299-BQ
on the SDATA_IN line. The output frame is driven
from the controller on the SDATA_OUT line. The
controller is also responsible for issuing reset com-
mands via the RESET# signal. Following a Cold
Reset, the CS4299-BQ is responsible for notifying
the controller that it is ready for operation after syn-
chronizing its internal functions. The CS4299-BQ
AC-link signals must use the same digital supply
voltage as the controller chip, either +5 V or
+3.3 V. See Section 3, AC Link Frame Definition,
for detailed AC-link information.
2.2
The CS4299-BQ contains a set of AC ’97 compli-
ant control registers and a set of Cirrus Logic de-
fined control registers. These registers control the
basic functions and features of the CS4299-BQ.
Read accesses of the control registers by the
AC ’97 controller are accomplished with the re-
quested register index in Slot 1 of a SDATA_OUT
frame. The following SDATA_IN frame will con-
Control registers
CODEC
CS4299-BQ
CS4299-BQ
DS319-BQPP2

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