CS5345-DQZR Cirrus Logic Inc, CS5345-DQZR Datasheet - Page 21
CS5345-DQZR
Manufacturer Part Number
CS5345-DQZR
Description
IC,Data Acquisition Signal Conditioner,6-CHANNEL,24-BIT,CMOS,QFP,48PIN,PLASTIC
Manufacturer
Cirrus Logic Inc
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DS658F2
SWITCHING CHARACTERISTICS - CONTROL PORT - SPI FORMAT
Inputs: Logic 0 = DGND = AGND = 0 V, Logic 1 = VLC, C
CCLK Clock Frequency
RESET Rising Edge to CS Falling
CS High Time Between Transmissions
CS Falling to CCLK Edge
CCLK Low Time
CCLK High Time
CDIN to CCLK Rising Setup Time
CCLK Rising to DATA Hold Time
CCLK Falling to CDOUT Stable
Rise Time of CDOUT
Fall Time of CDOUT
Rise Time of CCLK and CDIN
Fall Time of CCLK and CDIN
21. Data must be held for sufficient time to bridge the transition time of CCLK.
22. For f
sck
<1 MHz.
CDOUT
Parameter
CDIN
CCLK
RST
CS
t css
Figure 6. Control Port Timing - SPI Format
t r2
t srs
t dsu
t scl
t f2
(Note 21)
(Note 22)
(Note 22)
t sch
t dh
L
= 30 pF.
Symbol
t pd
f
t
t
t
t
t
t
t
t
csh
sch
dsu
t
t
t
sck
srs
css
t
scl
dh
pd
r1
f1
r2
f2
Min
500
1.0
20
66
66
40
15
-
-
-
-
-
-
t csh
Max
100
100
6.0
50
25
25
-
-
-
-
-
-
-
CS5345
Units
MHz
μs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
21
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