CS8422-DNZ Cirrus Logic Inc, CS8422-DNZ Datasheet - Page 53

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CS8422-DNZ

Manufacturer Part Number
CS8422-DNZ
Description
IC 24-bit 192kHz SRC S/PDIF Receiver
Manufacturer
Cirrus Logic Inc
Datasheets
DS692PP1
11.11 Serial Audio Input Data Format (0Bh)
SIMS
7
0
SDOUT2[1:0] - Controls the data source for SDOUT2
MUTESAO1 - Mute control for the serial audio output port 1
MUTESAO2 - Mute control for the serial audio output port 2
SRCD - Controls the data source of the sample rate converter
SIMS - Master/Slave Mode Selector
SISF - ISCLK Frequency. Valid only in master mode (SIMS = 1). Should be changed when PDN = 1. See
Table 8
00 - Sample Rate Converter
01 - AES3 Receiver Output
10 - SDIN (SDIN and SDOUT should be synchronous)
11 - Reserved
00 - Sample Rate Converter
01 - AES3 Receiver Output
10 - SDIN (SDIN and SDOUT should be synchronous)
11 - Reserved
0 - SDOUT1 not muted
1 - SDOUT1 muted (set to all zeros)
0 - SDOUT2 not muted.
1 - SDOUT2 muted (set to all zeros).
0 - Serial Audio Input Port (SDIN)
1 - AES3 Receiver Output
0 - Serial audio input port is in slave mode. ISCLK and ILRCK are inputs.
1 - Serial audio input port is in master mode. ISCLK and ILRCK are outputs.
for details.
SISF
SAI_CLK[3:0]
6
0
0000
0001
0010
0011
0100
SIFSEL2
Table 8. ISCLK/ILRCK Ratios and SISF Settings
5
0
MCLK/ILRCK Ratio
SIFSEL1
4
0
128
192
256
64
96
SIFSEL0
3
0
SISF = 0
ISCLK/ILRCK Ratio
Reserved
64
48
64
48
64
2
SISF = 1
INVALID
Reserved
128
128
96
96
1
Reserved
CS8422
0
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