CY62148ELL-55SXAT Cypress Semiconductor Corp, CY62148ELL-55SXAT Datasheet

CY62148ELL-55SXAT

CY62148ELL-55SXAT

Manufacturer Part Number
CY62148ELL-55SXAT
Description
CY62148ELL-55SXAT
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY62148ELL-55SXAT

Format - Memory
RAM
Memory Type
SRAM
Memory Size
4M (512K x 8)
Speed
55ns
Interface
Parallel
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
32-SOIC (11.30mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
4-Mbit (512 K × 8) Static RAM
Features
Cypress Semiconductor Corporation
Document #: 38-05442 Rev. *H
Note
1. SOIC package is available only in 55 ns speed bin.
Very high speed: 45 ns
Voltage range: 4.5 V to 5.5 V
Pin compatible with CY62148B
Ultra low standby power
Ultra low active power
Easy memory expansion with CE, and OE features
Automatic power-down when deselected
Complementary metal oxide semiconductor (CMOS) for
optimum speed and power
Available in Pb-free 32-pin thin small outline package (TSOP) II
and 32-pin small-outline integrated circuit (SOIC)
Logic Block Diagram
Typical standby current: 1 µA
Maximum standby current: 7 µA (Industrial)
Typical active current: 2.0 mA at f = 1 MHz
WE
CE
OE
A 0
A 1
A 2
A 3
A 4
A 5
A 6
A 7
A 8
A 9
A 10
A 11
A 12
COLUMN DECODER
198 Champion Court
INPUT BUFFER
[1]
512K x 8
ARRAY
packages
POWER
DOWN
Functional Description
The CY62148E is a high performance CMOS static RAM
organized as 512 K words by 8-bits. This device features
advanced circuit design to provide ultra low active current. This
is ideal for providing More Battery Life™ (MoBL
applications such as cellular telephones. The device also has an
automatic power-down feature that significantly reduces power
consumption when addresses are not toggling. Placing the
device into standby mode reduces power consumption by more
than 99% when deselected (CE HIGH). The eight input and
output pins (I/O
state when the device is deselected (CE HIGH), Outputs are
disabled (OE HIGH), or during an active Write operation (CE
LOW and WE LOW)
To write to the device, take Chip Enable (CE) and Write Enable
(WE) inputs LOW. Data on the eight I/O pins (I/O
is then written into the location specified on the address pins (A
through A
To read from the device, take Chip Enable (CE) and Output
Enable (OE) LOW while forcing Write Enable (WE) HIGH. Under
these conditions, the contents of the memory location specified
by the address pins appear on the I/O pins.
For best practice recommendations, refer to the Cypress
application note
4-Mbit (512 K × 8) Static RAM
18
San Jose
).
0
AN1064, SRAM System
through I/O
,
CA 95134-1709
7
) are placed in a high impedance
IO 0
IO 1
IO 2
IO 3
IO 4
IO 5
IO 6
IO 7
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
CY62148E MoBL
0
1
2
3
4
5
6
7
Revised August 23, 2010
Guidelines.
®
0
) in portable
408-943-2600
through I/O
®
7
0
)
[+] Feedback

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CY62148ELL-55SXAT Summary of contents

Page 1

... Note 1. SOIC package is available only speed bin. Cypress Semiconductor Corporation Document #: 38-05442 Rev. *H 4-Mbit (512 K × 8) Static RAM Functional Description The CY62148E is a high performance CMOS static RAM organized as 512 K words by 8-bits. This device features advanced circuit design to provide ultra low active current. This is ideal for providing More Battery Life™ ...

Page 2

Contents 4-Mbit (512 K × 8) Static RAM .......................................... 1 Features ............................................................................. 1 Functional Description ..................................................... 1 Pin Configuration ............................................................. 3 Product Portfolio .............................................................. 3 Maximum Ratings ............................................................. 4 Operating Range ............................................................... 4 Electrical Characteristics ................................................. 4 Thermal Resistance .......................................................... ...

Page 3

... Pin Configuration Product Portfolio Product Range CY62148ELL TSOP II Industrial CY62148ELL SOIC Industrial/ Automotive-A Note 2. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at V Document #: 38-05442 Rev. *H Figure 1. 32-Pin SOIC/TSOP II Pinout Top View I/O ...

Page 4

Maximum Ratings Exceeding maximum ratings may shorten the useful life of the device. User guidelines are not tested. Storage temperature ............................... –65 ° 150 °C Ambient temperature with power applied .......................................... –55 ° 125 °C Supply ...

Page 5

Capacitance [10] Parameter Description C Input capacitance IN C Output capacitance OUT Thermal Resistance [10] Parameter Description Θ Thermal resistance JA (junction to ambient) Θ Thermal resistance JC (junction to case OUTPUT INCLUDING JIG ...

Page 6

Switching Characteristics Over the operating range [14] Parameter Description Read Cycle t Read cycle time RC t Address to data valid AA t Data hold from address change OHA t CE LOW to data valid ACE t ...

Page 7

Switching Waveforms Figure 4. Read Cycle No. 1 (Address Transition Controlled) ADDRESS DATA OUT PREVIOUS DATA VALID Figure 5. Read Cycle No. 2 (OE Controlled) ADDRESS CE t ACE OE t LZOE HIGH IMPEDANCE DATA OUT t LZCE t V ...

Page 8

Figure 7. Write Cycle No. 2 (CE Controlled) ADDRESS CE WE DATA I/O Figure 8. Write Cycle No. 3 (WE Controlled, OE LOW) ADDRESS NOTE DATA I/O t HZWE Truth Table [28] ...

Page 9

... Table 1. Key features and Ordering Information Speed Ordering Code (ns) 45 CY62148ELL-45ZSXI CY62148ELL-45ZSXA 55 CY62148ELL-55SXI CY62148ELL-55SXA Contact your local Cypress sales representative for availability of these parts. Ordering Code Definitions CY 621 45/55 ZSX Document #: 38-05442 Rev. *H ...

Page 10

Package Diagrams Document #: 38-05442 Rev. *H Figure 9. 32-Pin TSOP II, 51-85095 ® CY62148E MoBL 51-85095-*A Page [+] Feedback ...

Page 11

Figure 10. 32-Pin (450-Mil) Molded SOIC, 51-85081 Acronyms Acronym Description CMOS complementary metal oxide semiconductor I/O input/output MoBL more battery life SOIC small-outline integrated circuit SRAM static random access memory VFBGA very fine ball grid array TSOP thin small outline ...

Page 12

... DOE Corrected typo in Package Name Changed Ordering Information to include Pb-free Packages Changed from Preliminary to Final Changed the address of Cypress Semiconductor Corporation on Page #1 from “3901 North First Street” to “198 Champion Court” Removed 35ns Speed Bin Removed “L” version of CY62148E Changed I (Typ) value from 1 ...

Page 13

... Removed Automotive-E part and its related information Added footnote #2 related to SOIC package Added footnote #9 related to I SB2 Added AC values for 55 ns Industrial-SOIC range Updated Ordering Information table Added “CY62148ELL-45ZSXA” part in Ordering information. Added footnote related to chip enable in Updated Package Diagrams Added Contents, PSoC ...

Page 14

... Use may be limited by and subject to the applicable Cypress software license agreement. Document #: 38-05442 Rev. *H More Battery Life is a trademark and MoBL is a registered trademark of Cypress Semiconductor Corporation. All products and company names mentioned in this document may be the trademarks of their respective holders. ...

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