CY7C1021CV26-15VXET Cypress Semiconductor Corp, CY7C1021CV26-15VXET Datasheet - Page 6

CY7C1021CV26-15VXET

CY7C1021CV26-15VXET

Manufacturer Part Number
CY7C1021CV26-15VXET
Description
CY7C1021CV26-15VXET
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY7C1021CV26-15VXET

Format - Memory
RAM
Memory Type
SRAM - Asynchronous
Memory Size
1M (64K x 16)
Speed
15ns
Interface
Parallel
Voltage - Supply
2.5 V ~ 2.7 V
Operating Temperature
-40°C ~ 125°C
Package / Case
44-SOJ
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Switching Characteristics
Over the Operating Range
Document Number: 38-05589 Rev. *E
Write Cycle
t
t
t
t
t
t
t
t
t
t
t
Notes
WC
SCE
AW
HA
SA
PWE
SD
HD
LZWE
HZWE
BW
10. The internal Write time of the memory is defined by the overlap of CE LOW, WE LOW and BHE/BLE LOW. CE, WE and BHE/BLE must be LOW to initiate a Write,
11. At any given temperature and voltage condition, t
12. t
Parameter
and the transition of these signals can terminate the Write. The input data set-up and hold timing should be referenced to the leading edge of the signal that terminates the Write.
HZOE
, t
HZBE
[10]
, t
HZCE
, and t
Write cycle time
CE LOW to write end
Address set-up to write end
Address hold from write end
Address set-up to write start
WE pulse width
Data set-up to write end
Data hold from write end
WE HIGH to low Z
WE LOW to high Z
Byte enable to end of write
HZWE
[6]
are specified with a load capacitance of 5 pF as in part (d) of AC Test Loads. Transition is measured 500 mV from steady-state voltage.
(continued)
[11]
[11, 12]
Description
HZCE
is less than t
LZCE
, t
HZOE
is less than t
LZOE
, and t
HZWE
Min
15
10
10
10
0
0
8
0
3
9
is less than t
–15
LZWE
for any given device.
Max
7
CY7C1021CV26
Page 6 of 15
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
[+] Feedback

Related parts for CY7C1021CV26-15VXET