CY7C1347G-166AXIT Cypress Semiconductor Corp, CY7C1347G-166AXIT Datasheet - Page 11

• Manufacturer Part Number: CY7C1347G-166AXIT
• Description: CY7C1347G-166AXIT
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C1347G-166AXIT

• Format - Memory: RAM
• Memory Type: SRAM - Synchronous
• Memory Size: 4.5M (128K x 36)
• Speed: 166MHz
• Interface: Parallel
• Voltage - Supply: 3.15 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Maximum Ratings
Exceeding maximum ratings may shorten the useful life of the
device. User guidelines are not tested.
Storage temperature 65 C to +150 C
Ambient temperature with
power applied55 C to +125 C
Supply voltage on V
Supply voltage on V
DC voltage applied to outputs
in high Z State  0.5 V to V
DC input voltage  0.5 V to V
Current into outputs (LOW) ......................................... 20 mA
Static discharge voltage.......................................... > 2001 V
(MIL-STD-883, Method 3015)
Latch-up Current.................................................... > 200 mA
Operating Range
Electrical Characteristics
Over the Operating Range
Document #: 38-05516 Rev. *I
V
V
V
V
V
V
I
I
Notes
Parameter
X
OZ
9. Overshoot: V
10. t
DD
DDQ
OH
OL
IH
IL
Commercial
Industrial
power-up
Range
: assumes a linear ramp from 0V to V
Power supply voltage
I/O supply voltage
Output HIGH voltage
Output LOW voltage
Input HIGH voltage
Input LOW voltage
Input leakage current
except ZZ and MODE
Input current of MODE
Input current of ZZ
Output leakage current
IH
(AC) < V
–40 °C to +85 °C
0 °C to +70 °C
DD
DDQ
Description
Temperature
DD
Ambient
relative to GND  0.5 V to +4.6 V
relative to GND0.5 V to +V
+1.5 V (pulse width less than t
[9, 10]
[9]
[9]
3.3 V5% /
DD
For 3.3 V I/O, I
For 2.5 V I/O, I
For 3.3 V I/O, I
For 2.5 V I/O, I
For 3.3 V I/O
For 2.5 V I/O
For 3.3 V I/O
For 2.5 V I/O
GND < V
Input = V
Input = V
Input = V
Input = V
GND  V
+ 10%
(min) within 200 ms. During this time V
V
DD
CYC
I
I
SS
DD
SS
DD
DD
DD
 V
< V
5% to V
/2). Undershoot: V
2.5 V 
V
+ 0.5 V
+ 0.5 V
DDQ,
DDQ
DDQ
OH
OH
OL
OL
DD
= 8.0 mA
= 1.0 mA
DD
= –4.0 mA
= –1.0 mA
output disabled
Test Conditions
IL
(AC) > –2 V (pulse width less than t
Neutron Soft Error Immunity
LSBU
LMBU
SEL
* No LMBU or SEL events occurred during testing; this column represents a
statistical 
Application Note,
Terrestrial Failure Rates – AN54908.
Parameter Description
IH
< V
DD
2
and V
, 95% confidence limit calculation. For more details refer to
Logical
single-bit
upsets
Logical
multi-bit
upsets
Single event
latch-up
DDQ
Accelerated Neutron SER Testing and Calculation of
< V
DD
.
CYC
Conditions
/2).
25 °C
25 °C
85 °C
2.375
3.135
Test
–0.3
–0.3
Min
30
2.4
2.0
2.0
1.7
5
5
5
–
–
–
–
V
V
CY7C1347G
Typ Max* Unit
361
DD
DD
0
0
Max
V
3.6
0.4
0.4
0.8
0.7
30
+ 0.3 V
+ 0.3 V
DD
–
–
5
–
5
–
5
Page 11 of 24
0.01
394
0.1
Unit
A
A
A
A
A
A
FIT/
FIT/
FIT/
Dev
Mb
Mb
V
V
V
V
V
V
V
V
V
V
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