CY7C1470V33-200AXC Cypress Semiconductor Corp, CY7C1470V33-200AXC Datasheet - Page 20

• Manufacturer Part Number: CY7C1470V33-200AXC
• Description: IC,SYNC SRAM,2MX36,CMOS,QFP,100PIN,PLASTIC
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C1470V33-200AXC

• Format - Memory: RAM
• Memory Type: SRAM - Synchronous
• Memory Size: 72M (2M x 36)
• Speed: 200MHz
• Interface: Parallel
• Voltage - Supply: 3.135 V ~ 3.6 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Maximum Ratings
Exceeding maximum ratings may shorten the useful life of the
device. User guidelines are not tested.
Storage temperature ................................ –65 °C to +150 °C
Ambient temperature with
power applied ........................................... –55 °C to +125 °C
Supply voltage on V
Supply voltage on V
DC to outputs in tri-state ....................–0.5 V to V
DC input voltage .................................. –0.5 V to V
Current into outputs (LOW) ......................................... 20 mA
Static discharge voltage.......................................... > 2001 V
(per MIL-STD-883, method 3015)
Latch-up current .................................................... > 200 mA
Operating Range
Electrical Characteristics
Over the Operating Range
Document Number: 38-05289 Rev. *M
Commercial 0 °C to +70 °C
Industrial
V
V
V
V
V
V
I
I
Notes
X
OZ
16. Overshoot: V
17. T
Parameter
DD
DDQ
OH
OL
IH
IL
Range
power up
: Assumes a linear ramp from 0 V to V
–40 °C to +85 °C
IH
Temperature
Power supply voltage
I/O supply voltage
Output HIGH voltage
Output LOW voltage
Input HIGH voltage
Input LOW voltage
Input leakage current
except ZZ and MODE
Input current of MODE
Input current of ZZ
Output leakage current GND ≤ V
(AC) < V
Ambient
DD
DDQ
Description
DD
relative to GND ........–0.5 V to +4.6 V
relative to GND....... –0.5 V to +V
+1.5 V (Pulse width less than t
[16, 17]
3.3 V – 5% /
[16]
[16]
+ 10%
V
DD
for 3.3 V I/O
for 2.5 V I/O
for 3.3 V I/O, I
for 2.5 V I/O, I
for 3.3 V I/O, I
for 2.5 V I/O, I
for 3.3 V I/O
for 2.5 V I/O
for 3.3 V I/O
for 2.5 V I/O
GND ≤ V
Input = V
Input = V
Input = V
Input = V
DD
(Min) within 200 ms. During this time V
2.5 V – 5% to
DDQ
CYC
I
SS
DD
SS
DD
I
DD
≤ V
≤ V
/2), undershoot: V
V
V
+ 0.5 V
+ 0.5 V
DDQ
DDQ
DDQ,
DD
OH
OH
OL
OL
= 8.0 mA
= 1.0 mA
= −1.0 mA
= −4.0 mA
DD
output disabled
Test Conditions
IL
(AC)> –2 V (Pulse width less than t
Neutron Soft Error Immunity
Parameter Description
LSBU
LMBU
SEL
* No LMBU or SEL events occurred during testing; this column represents a
statistical χ
Application Note
Calculation of Terrestrial Failure Rates”
IH
< V
DD
2
, 95% confidence limit calculation. For more details refer to
and V
Logical
single bit
upsets
Logical multi
bit upsets
Single event
latch-up
AN 54908 “Accelerated Neutron SER Testing and
DDQ
< V
DD
.
CYC
Conditions Typ Max* Unit
/2).
3.135
3.135
2.375
25 °C
25 °C
85 °C
–0.3
–0.3
Test
Min
–30
2.4
2.0
2.0
1.7
–5
–5
–5
–
–
–
CY7C1470V33
CY7C1472V33
CY7C1474V33
V
V
DD
DD
361
2.625
0
0
Max
V
3.6
0.4
0.4
0.8
0.7
30
+ 0.3V
+ 0.3V
–
–
5
5
–
5
DD
0.01
Page 20 of 33
394
0.1
Unit
μA
μA
μA
μA
μA
μA
V
V
V
V
V
V
V
V
V
V
V
FIT/
FIT/
FIT/
Dev
Mb
Mb
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