DSPIC33EP256MU806-E/MR Microchip Technology, DSPIC33EP256MU806-E/MR Datasheet - Page 321

• Manufacturer Part Number: DSPIC33EP256MU806-E/MR
• Description: 64 PINS, 256KB Flash, 28KB RAM, 60 MHz, USB, 2xCAN, 15 DMA 64 QFN 9x9x0.9mm TUBE
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33EPr

Specifications of DSPIC33EP256MU806-E/MR

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 60 MIPs
• Connectivity: CAN, I²C, IrDA, LIN, QEI, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 51
• Program Memory Size: 256KB (85.5K x 24)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 12K x 16
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 24x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 64-VFQFN Exposed Pad
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

REGISTER 19-3:
 2009-2011 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-10
bit 9-0
AMSK7
R/W-0
dsPIC33EPXXXMU806/810/814 and PIC24EPXXXGU810/814
U-0
—
Unimplemented: Read as ‘0’
AMSKx: Mask for Address bit x Select bit
For 10-bit Address:
1 = Enable masking for bit Ax of incoming message address; bit match is not required in this position
0 = Disable masking for bit Ax; bit match is required in this position
For 7-bit Address (I2CxMSK<6:0> only):
1 = Enable masking for bit Ax + 1 of incoming message address; bit match is not required in this
0 = Disable masking for bit Ax + 1; bit match is required in this position
AMSK6
R/W-0
position
U-0
—
I2CxMSK: I2Cx SLAVE MODE ADDRESS MASK REGISTER
W = Writable bit
‘1’ = Bit is set
AMSK5
R/W-0
U-0
—
AMSK4
R/W-0
U-0
—
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
AMSK3
R/W-0
U-0
—
AMSK2
R/W-0
U-0
—
x = Bit is unknown
AMSK9
AMSK1
R/W-0
R/W-0
DS70616E-page 321
AMSK8
AMSK0
R/W-0
R/W-0
bit 8
bit 0