DSPIC33EP512MU810T-I/PT Microchip Technology, DSPIC33EP512MU810T-I/PT Datasheet - Page 298

• Manufacturer Part Number: DSPIC33EP512MU810T-I/PT
• Description: 100 PINS, 512KB Flash, 52KB RAM, 60 MHz, USB, 2xCAN, 15 DMA 100 TQFP 12x12x1mm T
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33EPr

Specifications of DSPIC33EP512MU810T-I/PT

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 60 MIPs
• Connectivity: CAN, I²C, IrDA, LIN, QEI, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 83
• Program Memory Size: 512KB (170K x 24)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 24K x 16
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 32x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

dsPIC33EPXXXMU806/810/814 and PIC24EPXXXGU810/814
REGISTER 17-1:
DS70616E-page 298
bit 3
bit 2
bit 1-0
Note 1:
2:
3:
When CCM = 10 or CCM = 11, all of the QEI counters operate as timers and the PIMOD<2:0> bits are
ignored.
When CCM = 00 and QEA and QEB values match Index Match Value (IMV), the POSCNTH and
POSCNTL registers are reset.
The selected clock rate should be at least twice the expected maximum quadrature count rate.
CNTPOL: Position and Index Counter/Timer Direction Select bit
1 = Counter direction is negative unless modified by external Up/Down signal
0 = Counter direction is positive unless modified by external Up/Down signal
GATEN: External Count Gate Enable bit
1 = External gate signal controls position counter operation
0 = External gate signal does not affect position counter/timer operation
CCM<1:0>: Counter Control Mode Selection bits
11 = Internal timer mode with optional external count is selected
10 = External clock count with optional external count is selected
01 = External clock count with external up/down direction is selected
00 = Quadrature Encoder Interface (x4 mode) count mode is selected
QEIxCON: QEI CONTROL REGISTER (CONTINUED)
Preliminary
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