DSPIC33FJ128GP710A-H/PT Microchip Technology, DSPIC33FJ128GP710A-H/PT Datasheet - Page 214
![16 Bit MCU/DSP 100LD 40MIPS 128KB FLASH 100 TQFP 12x12x1mm TRAY](/photos/16/3/160366/tqfp-100_sml.jpg)
DSPIC33FJ128GP710A-H/PT
Manufacturer Part Number
DSPIC33FJ128GP710A-H/PT
Description
16 Bit MCU/DSP 100LD 40MIPS 128KB FLASH 100 TQFP 12x12x1mm TRAY
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheet
1.DSPIC33FJ64GP206A-IMR.pdf
(338 pages)
Specifications of DSPIC33FJ128GP710A-H/PT
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
CAN, I²C, IrDA, LIN, SPI, UART/USART
Peripherals
AC'97, Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
85
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 32x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 140°C
Package / Case
100-TQFP
Processor Series
dsPIC33F
Core
dsPIC
Data Bus Width
16 bit
Interface Type
SPI, I2C, UART, JTAG
Number Of Programmable I/os
35
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 140 C
Mounting Style
SMD/SMT
Development Tools By Supplier
MPLAB IDE Software
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 13 Channel
A/d Bit Size
10 bit
A/d Channels Available
13
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DSPIC33FJ128GP710A-H/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
- Current page: 214 of 338
- Download datasheet (3Mb)
dsPIC33FJXXXGPX06A/X08A/X10A
REGISTER 19-11: CiFEN1: ECAN™ ACCEPTANCE FILTER ENABLE REGISTER
REGISTER 19-12: CiBUFPNT1: ECAN™ FILTER 0-3 BUFFER POINTER REGISTER
DS70593B-page 214
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-0
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-12
bit 11-8
bit 7-4
bit 3-0
FLTEN15
FLTEN7
R/W-1
R/W-1
R/W-0
R/W-0
FLTENn: Enable Filter n to Accept Messages bits
1 = Enable Filter n
0 = Disable Filter n
F3BP<3:0>: RX Buffer Written when Filter 3 Hits bits
F2BP<3:0>: RX Buffer Written when Filter 2 Hits bits
F1BP<3:0>: RX Buffer Written when Filter 1 Hits bits
F0BP<3:0>: RX Buffer Written when Filter 0 Hits bits
1111 = Filter hits received in RX FIFO buffer
1110 = Filter hits received in RX Buffer 14
•
•
•
0001 = Filter hits received in RX Buffer 1
0000 = Filter hits received in RX Buffer 0
FLTEN14
FLTEN6
R/W-1
R/W-1
R/W-0
R/W-0
F3BP<3:0>
F1BP<3:0>
W = Writable bit
W = Writable bit
‘1’ = Bit is set
‘1’ = Bit is set
FLTEN13
FLTEN5
R/W-1
R/W-1
R/W-0
R/W-0
FLTEN12
FLTEN4
R/W-1
R/W-1
R/W-0
R/W-0
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
FLTEN11
FLTEN3
R/W-1
R/W-1
R/W-0
R/W-0
FLTEN10
FLTEN2
R/W-1
R/W-1
R/W-0
R/W-0
F2BP<3:0>
F0BP<3:0>
2009 Microchip Technology Inc.
x = Bit is unknown
x = Bit is unknown
FLTEN9
FLTEN1
R/W-1
R/W-1
R/W-0
R/W-0
FLTEN8
FLTEN0
R/W-1
R/W-1
R/W-0
R/W-0
bit 8
bit 0
bit 8
bit 0
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