DSPIC33FJ128MC202-E/SP Microchip Technology, DSPIC33FJ128MC202-E/SP Datasheet - Page 16
![16-bit DSC, 128KB Flash,Motor,DMA,40 MIPS,nanoWatt 28 SPDIP .300in TUBE](/photos/6/59/65908/150-28-dip_sml.jpg)
DSPIC33FJ128MC202-E/SP
Manufacturer Part Number
DSPIC33FJ128MC202-E/SP
Description
16-bit DSC, 128KB Flash,Motor,DMA,40 MIPS,nanoWatt 28 SPDIP .300in TUBE
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Specifications of DSPIC33FJ128MC202-E/SP
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 6x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- Current page: 16 of 436
- Download datasheet (6Mb)
dsPIC33FJ32MC302/304, dsPIC33FJ64MCX02/X04 AND dsPIC33FJ128MCX02/X04
FIGURE 1-1:
DS70291E-page 16
Note:
OSC2/CLKO
OSC1/CLKI
PSV and Table
Control Block
Data Access
Program Memory
RTCC
EPSP
PMP/
Address Latch
Data Latch
23
Not all pins or features are implemented on all device pinout configurations. See
present on each device.
23
Generation
FRC/LPRC
Reference
Band Gap
Comparator
Oscillators
Regulator
Precision
Voltage
Controller
Timing
Interrupt
V
DAC1
2 Ch.
CAP
23
dsPIC33FJ32MC302/304, dsPIC33FJ64MCX02/X04 AND dsPIC33FJ128MCX02/
X04 BLOCK DIAGRAM
Control Signals
to Various Blocks
ECAN1
SPI1, 2
V
Control
DD
Decode and
Instruction
Stack
Logic
PCU
Program Counter
Start-up Timer
, V
Control
24
Watchdog
Brown-out
Power-up
Oscillator
Power-on
SS
8
Reset
Reset
Timer
Timer
PCH PCL
IC1, 2, 7, 8
MCLR
Timers
Control
Logic
Loop
1-5
16
UART1, 2
Divide Support
DSP Engine
CNx
16
Y Data Bus
X Data Bus
Data Latch
Instruction Reg
Address
Address Generator Units
X RAM
ROM Latch
Latch
16
16
ADC1
I2C1
Data Latch
Address
Y RAM
Latch
W Register Array
16
16
EA MUX
PWM1-4
16 x 16
QEI1, 2
16
OC/
“Pin Diagrams”
16-bit ALU
16
16
Controller
DMA
RAM
DMA
16
PWM
PWM
2 Ch
6 Ch
© 2011 Microchip Technology Inc.
16
for the specific pins and features
16
Remappable
PORTA
PORTB
PORTC
Pins
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