DSPIC33FJ128MC204T-I/ML Microchip Technology, DSPIC33FJ128MC204T-I/ML Datasheet - Page 234
![16-bit DSC, 128KB Flash,Motor,DMA,40 MIPS,nanoWatt 44 QFN 8x8x0.9mm T/R](/photos/6/81/68122/150-44-qfn_sml.jpg)
DSPIC33FJ128MC204T-I/ML
Manufacturer Part Number
DSPIC33FJ128MC204T-I/ML
Description
16-bit DSC, 128KB Flash,Motor,DMA,40 MIPS,nanoWatt 44 QFN 8x8x0.9mm T/R
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Specifications of DSPIC33FJ128MC204T-I/ML
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 9x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
DSPIC33FJ128MC204T-I/MLTR
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- Download datasheet (6Mb)
dsPIC33FJ32MC302/304, dsPIC33FJ64MCX02/X04 AND dsPIC33FJ128MCX02/X04
FIGURE 19-1:
DS70291E-page 234
SDAx
SCLx
I
2
C™ BLOCK DIAGRAM (
Shift Clock
Shift
Clock
BRG Down Counter
Match Detect
Start and Stop
Start and Stop
Bit Generation
Acknowledge
Generation
I2CxRCV
I2CxRSR
I2CxADD
Stretching
Bit Detect
I2CxTRN
Collision
Reload
Control
Detect
Clock
T
CY
/2
LSb
LSb
X
Address Match
= 1)
I2CxBRG
I2CxSTAT
I2CxCON
I2CxMSK
© 2011 Microchip Technology Inc.
Write
Read
Write
Read
Data Bus
Internal
Write
Read
Write
Read
Write
Read
Write
Read
Read
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