DSPIC33FJ12GP202-E/SS Microchip Technology, DSPIC33FJ12GP202-E/SS Datasheet - Page 3

• Manufacturer Part Number: DSPIC33FJ12GP202-E/SS
• Description: 12KB, Flash, 1KB RAM, 40MIPS, 21I/O, 16-bit Family,nanoWatt 28 SSOP .209in TUBE
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ12GP202-E/SS

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 21
• Program Memory Size: 12KB (12K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 10x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 28-SSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

TABLE 2:
© 2010 Microchip Technology Inc.
Note 1:
Module
UART
CPU
ADC
SPI
I
I
I
2
2
2
C
C
C
Only those issues indicated in the last column apply to the current silicon revision.
Consumption
SILICON ISSUE SUMMARY (CONTINUED)
Addressing
Generation
Instruction
Character
FRMDLY
Feature
in Sleep
Current
Break
10-bit
Slave
Mode
EXCH
—
—
Number
Item
19.
20.
21.
22.
23.
24.
25.
With the I
interrupt input functions (if any) associated with SCL and
SDA pins do not reflect the actual digital logic levels on
the pins.
The 10-bit slave does not set the RBF flag or load the
I2CxRCV register on address match if the Least Signifi-
cant bits (LSbs) of the address are the same as the 7-bit
reserved addresses.
After the ACKSTAT bit is set when receiving a NACK, it
may be cleared by the reception of a Start or Stop bit.
The EXCH instruction does not execute correctly.
The UART module will not generate back-to-back Break
characters.
The SPI communication in Framed mode does not func-
tion correctly if the Slave SPI frame delay bit (FRMDLY)
is set to ‘1’.
If the ADC module is in an enabled state when the device
enters Sleep Mode, the power-down current (I
device may exceed the device data sheet specifications.
2
C module enabled, the port bits and external
Issue Summary
PD
) of the
A2 A3 A4 A5
X
X
X
X
X
X
X
DS80462E-page 3
Revisions
Affected
X
X
X
X
X
X
X
X
X
X
X
X
X
X
(1)
X
X
X
X
X
X
X