DSPIC33FJ16GP102-E/SS Microchip Technology, DSPIC33FJ16GP102-E/SS Datasheet - Page 239

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DSPIC33FJ16GP102-E/SS

Manufacturer Part Number
DSPIC33FJ16GP102-E/SS
Description
16-bit DSC Family, 16 MIPS, 16KB Flash, 1KB RAM 28 SSOP .209in TUBE
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheet

Specifications of DSPIC33FJ16GP102-E/SS

Core Processor
dsPIC
Core Size
16-Bit
Speed
16 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-SSOP (0.209", 5.30mm Width)
Core
dsPIC
Processor Series
dsPIC33F
Data Bus Width
16 bit
On-chip Adc
Yes
Number Of Programmable I/os
35
Operating Supply Voltage
3.3 V
A/d Bit Size
10 bit
A/d Channels Available
13
Interface Type
SPI, I2C, UART, JTAG
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
TABLE 24-2:
© 2011 Microchip Technology Inc.
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
Base
Instr
dsPIC33FJ16GP101/102 AND dsPIC33FJ16MC101/102
#
BTSC
BTSS
BTST
BTSTS
CALL
CLR
CLRWDT
COM
CP
CP0
CPB
CPSEQ
CPSGT
CPSLT
CPSNE
DAW
DEC
DEC2
DISI
Mnemonic
Assembly
INSTRUCTION SET OVERVIEW (CONTINUED)
BTSC
BTSC
BTSS
BTSS
BTST
BTST.C
BTST.Z
BTST.C
BTST.Z
BTSTS
BTSTS.C
BTSTS.Z
CALL
CALL
CLR
CLR
CLR
CLR
CLRWDT
COM
COM
COM
CP
CP
CP
CP0
CP0
CPB
CPB
CPB
CPSEQ
CPSGT
CPSLT
CPSNE
DAW
DEC
DEC
DEC
DEC2
DEC2
DEC2
DISI
f,#bit4
Ws,#bit4
f,#bit4
Ws,#bit4
f,#bit4
Ws,#bit4
Ws,#bit4
Ws,Wb
Ws,Wb
f,#bit4
Ws,#bit4
Ws,#bit4
lit23
Wn
f
WREG
Ws
Acc,Wx,Wxd,Wy,Wyd,AWB
f
f,WREG
Ws,Wd
f
Wb,#lit5
Wb,Ws
f
Ws
f
Wb,#lit5
Wb,Ws
Wb, Wn
Wb, Wn
Wb, Wn
Wb, Wn
Wn
f
f,WREG
Ws,Wd
f
f,WREG
Ws,Wd
#lit14
Assembly Syntax
Preliminary
Bit Test f, Skip if Clear
Bit Test Ws, Skip if Clear
Bit Test f, Skip if Set
Bit Test Ws, Skip if Set
Bit Test f
Bit Test Ws to C
Bit Test Ws to Z
Bit Test Ws<Wb> to C
Bit Test Ws<Wb> to Z
Bit Test then Set f
Bit Test Ws to C, then Set
Bit Test Ws to Z, then Set
Call subroutine
Call indirect subroutine
f = 0x0000
WREG = 0x0000
Ws = 0x0000
Clear Accumulator
Clear Watchdog Timer
f = f
WREG = f
Wd = Ws
Compare f with WREG
Compare Wb with lit5
Compare Wb with Ws (Wb – Ws)
Compare f with 0x0000
Compare Ws with 0x0000
Compare f with WREG, with Borrow
Compare Wb with lit5, with Borrow
Compare Wb with Ws, with Borrow
Compare Wb with Wn, skip if =
Compare Wb with Wn, skip if >
Compare Wb with Wn, skip if <
Compare Wb with Wn, skip if ≠
Wn = decimal adjust Wn
f = f – 1
WREG = f – 1
Wd = Ws – 1
f = f – 2
WREG = f – 2
Wd = Ws – 2
Disable Interrupts for k instruction cycles
(Wb – Ws – C)
Description
Words
# of
1
1
1
1
1
1
1
1
1
1
1
1
2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Cycles
(2 or 3)
(2 or 3)
(2 or 3)
(2 or 3)
(2 or 3)
(2 or 3)
(2 or 3)
(2 or 3)
DS70652C-page 239
# of
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
OA,OB,SA,SB
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
Status Flags
WDTO,Sleep
Affected
None
None
None
None
None
None
None
None
None
None
None
None
None
None
N,Z
N,Z
N,Z
C
C
C
C
Z
Z
Z
Z
Z

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