DSPIC33FJ16MC101-I/P Microchip Technology, DSPIC33FJ16MC101-I/P Datasheet - Page 24
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DSPIC33FJ16MC101-I/P
Manufacturer Part Number
DSPIC33FJ16MC101-I/P
Description
16-bit Motor Control DSC Family, 16 MIPS, 16KB Flash, 1KB RAM 20 PDIP .300in TUB
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheet
1.DSPIC33FJ16GP101-IP.pdf
(322 pages)
Specifications of DSPIC33FJ16MC101-I/P
Processor Series
dsPIC33F
Core
dsPIC
Data Bus Width
16 bit
Program Memory Type
Flash
Program Memory Size
16 KB
Interface Type
SPI, I2C, UART, JTAG
Number Of Programmable I/os
35
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Development Tools By Supplier
MPLAB IDE Software
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 13 Channel
Featured Product
PIC24FJ/33FJ MCUs & dsPIC® DSCs
Core Processor
dsPIC
Core Size
16-Bit
Speed
16 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, Motor Control PWM, POR, PWM, WDT
Number Of I /o
15
Eeprom Size
-
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-DIP (0.300", 7.62mm)
Lead Free Status / Rohs Status
Details
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Quantity
Price
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Part Number:
DSPIC33FJ16MC101-I/P
Manufacturer:
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dsPIC33FJ16GP101/102 AND dsPIC33FJ16MC101/102
2.7
If the PLL of the target device is enabled and
configured for the device start-up oscillator, the
maximum oscillator source frequency must be limited
to 4 MHz < F
F
PLL start-up conditions. HSPLL mode is not supported.
This means that if the external oscillator frequency is
outside this range, the application must start-up in the
FRC mode first. The fixed PLL settings of 4x after a
POR with an oscillator frequency outside this range will
violate the device operating speed.
Once the device powers up, the application firmware
can enable the PLL, and then perform a clock switch to
the Oscillator + PLL clock source. Note that clock
switching must be enabled in the device Configuration
word.
2.8
If MPLAB ICD 2, MPLAB ICD 3, or MPLAB REAL ICE
in-circuit emulator is selected as a debugger, it
automatically initializes all of the analog-to-digital input
pins (ANx) as “digital” pins, by setting all bits in the
AD1PCFGL register.
The bits in the register that correspond to the
analog-to-digital pins that are initialized by MPLAB
ICD 2, MPLAB ICD 3, or MPLAB REAL ICE in-circuit
emulator, must not be cleared by the user application
firmware; otherwise, communication errors will result
between the debugger and the device.
If your application needs to use certain analog-to-digital
pins as analog input pins during the debug session, the
user application must clear the corresponding bits in
the AD1PCFGL register during initialization of the ADC
module.
When MPLAB ICD 2, MPLAB ICD 3, or MPLAB REAL
ICE in-circuit emulator is used as a programmer, the
user application firmware must correctly configure the
AD1PCFGL register. Automatic initialization of this
register is only done during debugger operation.
Failure to correctly configure the register(s) will result in
all analog-to-digital pins being recognized as analog
input pins, resulting in the port value being read as a
logic ‘0’, which may affect user application functionality.
2.9
Unused I/O pins should be configured as outputs and
driven to a logic-low state.
Alternately, connect a 1k to 10k resistor between V
and unused pins.
DS70652C-page 24
IN
< 8 MHz (for ECPLL mode) to comply with device
Oscillator Value Conditions on
Device Start-up
Configuration of Analog and
Digital Pins During ICSP
Operations
Unused I/Os
IN
< 8 MHz (for MSPLL mode) or 3 MHz <
Preliminary
SS
© 2011 Microchip Technology Inc.
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