DSPIC33FJ256GP506A-H/MR Microchip Technology, DSPIC33FJ256GP506A-H/MR Datasheet - Page 2
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DSPIC33FJ256GP506A-H/MR
Manufacturer Part Number
DSPIC33FJ256GP506A-H/MR
Description
16 Bit MCU/DSP 64LD 40MIPS 256KB FLASH 64 QFN 9x9x0.9mm TUBE
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Specifications of DSPIC33FJ256GP506A-H/MR
Core Processor
dsPIC
Core Size
16-Bit
Speed
20 MIPS
Connectivity
CAN, I²C, IrDA, LIN, SPI, UART/USART
Peripherals
AC'97, Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 18x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 140°C
Package / Case
64-VFQFN, Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
dsPIC33FJ256GPX06A/X08A/X10A
TABLE 2:
DS80483D-page 2
Note 1:
Controller
Module
ECAN
ECAN
UART
DMA
ADC
ADC
SPI
All
Only those issues indicated in the last column apply to the current silicon revision.
Consumption
Characters
CPU Write
WAKIF bit
Operation
Detection
DONE bit
Collision
Feature
in Sleep
SILICON ISSUE SUMMARY
Current
TBF bit
150ºC
Break
Mode
DMA
Number
Item
1.
2.
3.
4.
5.
6.
7.
8.
The WAKIF bit in the CxINTF register cannot be cleared by
software instruction after the device is interrupted from Sleep
due to activity on the CAN bus.
False DMA Error Traps may be generated in applications that
perform both transmissions and receptions using ECAN with
DMA.
The UART module will not generate consecutive break
characters.
The ADC Conversion Status bit (DONE) does not work when
External Interrupt is selected as the ADC trigger source.
Writing to the SPIBUF register as soon as the TBF bit is
cleared will cause the SPI module to ignore the written data.
DMA CPU write collisions will not be detected.
If the ADC module is in an enabled state when the device
enters Sleep Mode, the power-down current (I
may exceed the device data sheet specifications.
Affected revisions of silicon only support 140ºC operation
instead of 150ºC for extended operating temperature.
Issue Summary
PD
© 2010 Microchip Technology Inc.
) of the device
Revisions
A2
Affected
X
X
X
X
X
X
X
A3
X
X
X
X
X
X
X
(1)