DSPIC33FJ32GP202-E/SO Microchip Technology, DSPIC33FJ32GP202-E/SO Datasheet - Page 141
![no-image](/images/manufacturer_photos/0/4/439/microchip_technology_sml.jpg)
DSPIC33FJ32GP202-E/SO
Manufacturer Part Number
DSPIC33FJ32GP202-E/SO
Description
16-bit DSC, 32KB Flash,40 MIPS,nanoWatt 28 SOIC .300in TUBE
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheets
1.DSPIC33FJ12MC201-ISO.pdf
(14 pages)
2.DSPIC33FJ16GP304-IPT.pdf
(284 pages)
3.DSPIC33FJ16GP304-IPT.pdf
(8 pages)
4.DSPIC33FJ16GP304-IPT.pdf
(14 pages)
5.DSPIC33FJ32GP204-IPT.pdf
(14 pages)
Specifications of DSPIC33FJ32GP202-E/SO
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DSPIC33FJ32GP202-E/SO
Manufacturer:
Microchip Technology
Quantity:
135
- DSPIC33FJ12MC201-ISO PDF datasheet
- DSPIC33FJ16GP304-IPT PDF datasheet #2
- DSPIC33FJ16GP304-IPT PDF datasheet #3
- DSPIC33FJ16GP304-IPT PDF datasheet #4
- DSPIC33FJ32GP204-IPT PDF datasheet #5
- Current page: 141 of 284
- Download datasheet (4Mb)
REGISTER 12-2:
© 2011 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14
bit 13
bit 12-7
bit 6
bit 5-4
bit 3-2
bit 1
bit 0
Note 1:
dsPIC33FJ32GP202/204 and dsPIC33FJ16GP304
TON
R/W-0
U-0
—
2:
(2)
When 32-bit timer operation is enabled (T32 = 1) in the Timer Control register (T2CON<3>), the TSIDL bit
must be cleared to operate the 32-bit timer in Idle mode.
When the 32-bit timer operation is enabled (T32 = 1) in the Timer Control register (T2CON<3>), these bits
have no effect.
TON: Timer3 On bit
1 = Starts 16-bit Timer3
0 = Stops 16-bit Timer3
Unimplemented: Read as ‘0’
TSIDL: Stop in Idle Mode bit
1 = Discontinue timer operation when device enters Idle mode
0 = Continue timer operation in Idle mode
Unimplemented: Read as ‘0’
TGATE: Time
When TCS = 1:
This bit is ignored.
When TCS = 0:
1 = Gated time accumulation enabled
0 = Gated time accumulation disabled
TCKPS<1:0>: Timer3 Input Clock Prescale Select bits
11 = 1:256 prescale value
10 = 1:64 prescale value
01 = 1:8 prescale value
00 = 1:1 prescale value
Unimplemented: Read as ‘0’
TCS: Timer3 Clock Source Select bit
1 = External clock from T3CK pin
0 = Internal clock (F
Unimplemented: Read as ‘0’
TGATE
R/W-0
U-0
—
T3CON CONTROL REGISTER
(2)
r
W = Writable bit
‘1’ = Bit is set
3 Gated Time Accumulation Enable bit
TSIDL
R/W-0
R/W-0
(2)
OSC
TCKPS<1:0>
(1)
/2)
(1)
R/W-0
U-0
(2)
—
(2)
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
U-0
U-0
—
—
(2)
(2)
U-0
U-0
—
—
x = Bit is unknown
TCS
R/W-0
U-0
—
(2)
DS70290G-page 141
U-0
U-0
—
—
bit 8
bit 0
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