DSPIC33FJ32GP302T-I/MM Microchip Technology, DSPIC33FJ32GP302T-I/MM Datasheet - Page 165
DSPIC33FJ32GP302T-I/MM
Manufacturer Part Number
DSPIC33FJ32GP302T-I/MM
Description
16 Bit MCU/DSP 40MIPS 32 KB FLASH 28 QFN-S 6x6mm T/R
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Specifications of DSPIC33FJ32GP302T-I/MM
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
AC'97, Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
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Part Number
Manufacturer
Quantity
Price
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11.7
The dsPIC33FJ32GP302/304, dsPIC33FJ64GPX02/
X04, and dsPIC33FJ128GPX02/X04 family of devices
implement 33 registers for remappable peripheral
configuration:
• 16 Input Remappable Peripheral Registers:
• 13 Output Remappable Peripheral Registers:
REGISTER 11-1:
© 2011 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-13
bit 12-8
bit 7-0
dsPIC33FJ32GP302/304, dsPIC33FJ64GPX02/X04, AND dsPIC33FJ128GPX02/X04
- RPINR0-RPINR1, RPINR3-RPINR4,
- RPOR0-RPOR12
Note:
RPINR7, RPINR10-RPINR11 and
PRINR18-RPINR26
U-0
U-0
—
—
Peripheral Pin Select Registers
Input and Output Register values can only
be
(OSCCON<6>)
Section 11.6.3.1
Lock”
Unimplemented: Read as ‘0’
INT1R<4:0>: Assign External Interrupt 1 (INTR1) to the corresponding RPn pin
11111 = Input tied to V
11001 = Input tied to RP25
•
•
•
00001 = Input tied to RP1
00000 = Input tied to RP0
Unimplemented: Read as ‘0’
changed
for a specific command sequence.
U-0
U-0
—
—
RPINR0: PERIPHERAL PIN SELECT INPUT REGISTER 0
if
is
W = Writable bit
‘1’ = Bit is set
“Control
the
set
U-0
U-0
—
—
IOLOCK
to
SS
‘0’.
Register
R/W-1
See
U-0
—
bit
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-1
U-0
—
INT1R<4:0>
R/W-1
U-0
—
x = Bit is unknown
R/W-1
U-0
—
DS70292E-page 165
R/W-1
U-0
—
bit 8
bit 0
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