DSPIC33FJ32MC204T-I/ML Microchip Technology, DSPIC33FJ32MC204T-I/ML Datasheet - Page 2
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DSPIC33FJ32MC204T-I/ML
Manufacturer Part Number
DSPIC33FJ32MC204T-I/ML
Description
16-bit DSC, 32KB Flash,Motor,40 MIPS,nanoWatt 44 QFN 8x8x0.9mm T/R
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheets
1.DSPIC33FJ32MC202-IMM.pdf
(320 pages)
2.DSPIC33FJ32MC202-IMM.pdf
(14 pages)
3.DSPIC33FJ32MC202-IMM.pdf
(14 pages)
Specifications of DSPIC33FJ32MC204T-I/ML
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 9x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
DSPIC33FJ32MC204T-I/MLTR
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DSPIC33FJ32MC204T-I/ML
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
dsPIC33FJ32MC202/204 and dsPIC33FJ16MC304
TABLE 2:
DS80463E-page 2
Note 1:
Identification
Operations
Regulator
Module
Product
Internal
Voltage
UART
UART
UART
UART
UART
UART
UART
UART
JTAG
I
2
PSV
SPI
I
I
C™
2
2
C
C
Only those issues indicated in the last column apply to the current silicon revision.
Programming
SILICON ISSUE SUMMARY
Temperature
Sleep Mode
High-Speed
High-Speed
SFR Writes
Addressing
Addressing
Auto-Baud
Auto-Baud
Auto-Baud
SCKx Pins
Extended
Interrupts
IR Mode
IR Mode
Feature
Flash
Mode
Mode
10-bit
10-bit
—
Number
Item
10.
12.
13.
14.
15.
16.
11.
1.
2.
3.
4.
5.
6.
7.
8.
9.
JTAG programming does not work.
The auto-baud feature may not calculate the correct
baud rate when the Baud Rate Generator (BRG) is
set up for 4x mode.
With the auto-baud feature selected, the Sync Break
character (0x55) may be loaded into the FIFO as
data.
The auto-baud feature measures baud rate
inaccurately for certain baud rate and clock speed
combinations.
When an auto-baud is detected, the receive interrupt
may occur twice.
The 16x baud clock signal on the BCLK pin is
present only when the module is transmitting.
When the UART is in 4x mode (BRGH = 1) and using
two Stop bits (STSEL = 1), it may sample the first
Stop bit instead of the second one.
The SPIxCON1 DISSCK bit does not influence port
functionality.
The BCL bit in I2CSTAT can be cleared only with 16-
bit operation and can be corrupted with 1-bit or 8-bit
operations on I2CSTAT.
When the I
addressing using the same address bits (A10 and
A9) as other I
work as expected.
Revision A2 devices marked as extended
temperature range (E) devices, support only
industrial temperature range (I).
The UART error interrupt may not occur, or may
occur at an incorrect time, if multiple errors occur
during a short period of time.
When the UART module is operating in 8-bit mode
(PDSEL = 0x) and using the IrDA
(IREN = 1), the module incorrectly transmits a data
payload of 80h as 00h.
When the VREGS bit (RCON<8>) is set to a logic ‘0’,
device may Reset and higher sleep current may be
observed.
An address error trap occurs in certain addressing
modes when accessing the first four bytes of any
PSV page.
When the I
with an address of 0x102, the I2CxRCV register
content for the lower address byte is 0x01 rather
than 0x02.
2
2
C module is configured for 10-bit
C module is configured as a 10-bit slave
2
C device A10 and A9 bits may not
Issue Summary
®
encoder/decoder
© 2010 Microchip Technology Inc.
A2 A3 A4 A5 A6
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Revisions
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Affected
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(1)
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